12 citations · 19 across the 4 of their papers we have counts for
5 papers
SEER: Super-Optimization Explorer for HLS using E-graph Rewriting with MLIR
Jianyi Cheng, Samuel Coward, Lorenzo Chelini +2
High-level synthesis (HLS) is a process that automatically translates a software program in a high-level language into a low-level hardware description. However, the hardware desig…
CINM (Cinnamon): A Compilation Infrastructure for Heterogeneous Compute In-Memory and Compute Near-Memory Paradigms
Asif Ali Khan, Hamid Farzaneh, Karl F. A. Friebel +3
The rise of data-intensive applications exposed the limitations of conventional processor-centric von-Neumann architectures that struggle to meet the off-chip memory bandwidth dema…
MOM: Matrix Operations in MLIR
Lorenzo Chelini, Henrik Barthels, Paolo Bientinesi +3
Modern research in code generators for dense linear algebra computations has shown the ability to produce optimized code with a performance which compares and often exceeds the one…
TDO-CIM: Transparent Detection and Offloading for Computation In-memory
Kanishkan Vadivel, Lorenzo Chelini, Ali BanaGozar +4
Computation in-memory is a promising non-von Neumann approach aiming at completely diminishing the data transfer to and from the memory subsystem. Although a lot of architectures h…
Near-Memory Computing: Past, Present, and Future
Gagandeep Singh, Lorenzo Chelini, Stefano Corda +5
The conventional approach of moving data to the CPU for computation has become a significant performance bottleneck for emerging scale-out data-intensive applications due to their…