16 citations · 16 across the 2 of their papers we have counts for
Showing cs.ARShow all
2 papers · 1 filter
cs.AR2024
Agile TLB Prefetching and Prediction Replacement Policy
Melkamu Mersha, Tsion Abay, Mingziem Bitewa +1
Virtual-to-physical address translation is a critical performance bottleneck in paging-based virtual memory systems. The Translation Lookaside Buffer (TLB) accelerates address tran…
cs.AR2020★ 16 cited
The gem5 Simulator: Version 20.0+
Jason Lowe-Power, Abdul Mutaal Ahmad, Ayaz Akram +75
The open-source and community-supported gem5 simulator is one of the most popular tools for computer architecture research. This simulation infrastructure allows researchers to mod…