16 citations · 17 across the 9 of their papers we have counts for
6 papers · 1 filter
Simulation-Driven Evaluation of Chiplet-Based Architectures Using VisualSim
Wajid Ali, Ayaz Akram, Deepak Shankar
This paper focuses on the simulation of multi-die System-on-Chip (SoC) architectures using VisualSim, emphasizing chiplet-based system modeling and performance analysis. Chiplet te…
TDRAM: Tag-enhanced DRAM for Efficient Caching
Maryam Babaie, Ayaz Akram, Wendy Elsasser +6
As SRAM-based caches are hitting a scaling wall, manufacturers are integrating DRAM-based caches into system designs to continue increasing cache sizes. While DRAM caches can impro…
Accelerating Computer Architecture Simulation through Machine Learning
Wajid Ali, Ayaz Akram
This paper presents our approach to accelerate computer architecture simulation by leveraging machine learning techniques. Traditional computer architecture simulations are time-co…
Enabling Design Space Exploration of DRAM Caches in Emerging Memory Systems
Maryam Babaie, Ayaz Akram, Jason Lowe-Power
The increasing growth of applications' memory capacity and performance demands has led the CPU vendors to deploy heterogeneous memory systems either within a single system or via d…
A Cycle-level Unified DRAM Cache Controller Model for 3DXPoint Memory Systems in gem5
Maryam Babaie, Ayaz Akram, Jason Lowe-Power
To accommodate the growing memory footprints of today's applications, CPU vendors have employed large DRAM caches, backed by large non-volatile memories like Intel Optane (e.g., In…
The gem5 Simulator: Version 20.0+
Jason Lowe-Power, Abdul Mutaal Ahmad, Ayaz Akram +75
The open-source and community-supported gem5 simulator is one of the most popular tools for computer architecture research. This simulation infrastructure allows researchers to mod…