16 citations · 20 across the 12 of their papers we have counts for
12 papers
Pickle: Precise, Flexible Cross-Core Last-level Cache Data Prefetching for Irregular Memory Accesses
Hoa Nguyen, Pongstorn Maidee, Jason Lowe-Power +1
Graph analytics and sparse scientific workloads are dominated by parallel chains of data-dependent, long-latency memory accesses whose patterns are difficult for hardware to infer…
Choreographer: A Full-System Framework for Fine-Grained Tasks in Cache Hierarchies
Hoa Nguyen, Pongstorn Maidee, Jason Lowe-Power +1
In this paper, we introduce Choreographer, a simulation framework that enables a holistic system-level evaluation of fine-grained accelerators designed for latency-sensitive tasks.…
Portable Targeted Sampling Framework Using LLVM
Zhantong Qiu, Mahyar Samani, Jason Lowe-Power
Evaluating architectural ideas on realistic workloads is increasingly challenging due to the prohibitive cost of detailed simulation and the lack of portable sampling tools. Existi…
Characterizing GPU Energy Usage in Exascale-Ready Portable Science Applications
William F. Godoy, Oscar Hernandez, Paul R. C. Kent +8
We characterize the GPU energy usage of two widely adopted exascale-ready applications representing two classes of particle and mesh solvers: (i) QMCPACK, a quantum Monte Carlo pac…
TDRAM: Tag-enhanced DRAM for Efficient Caching
Maryam Babaie, Ayaz Akram, Wendy Elsasser +6
As SRAM-based caches are hitting a scaling wall, manufacturers are integrating DRAM-based caches into system designs to continue increasing cache sizes. While DRAM caches can impro…
TEGRA -- Scaling Up Terascale Graph Processing with Disaggregated Computing
William Shaddix, Mahyar Samani, Marjan Fariborz +3
Graphs are essential for representing relationships in various domains, driving modern AI applications such as graph analytics and neural networks across science, engineering, cybe…
FP-Rowhammer: DRAM-Based Device Fingerprinting
Hari Venugopalan, Kaustav Goswami, Zainul Abi Din +3
Device fingerprinting leverages attributes that capture heterogeneity in hardware and software configurations to extract unique and stable fingerprints. Fingerprinting countermeasu…
Enabling Design Space Exploration of DRAM Caches in Emerging Memory Systems
Maryam Babaie, Ayaz Akram, Jason Lowe-Power
The increasing growth of applications' memory capacity and performance demands has led the CPU vendors to deploy heterogeneous memory systems either within a single system or via d…
A Cycle-level Unified DRAM Cache Controller Model for 3DXPoint Memory Systems in gem5
Maryam Babaie, Ayaz Akram, Jason Lowe-Power
To accommodate the growing memory footprints of today's applications, CPU vendors have employed large DRAM caches, backed by large non-volatile memories like Intel Optane (e.g., In…
The Tribes of Machine Learning and the Realm of Computer Architecture
Ayaz Akram, Jason Lowe-Power
Machine learning techniques have influenced the field of computer architecture like many other fields. This paper studies how the fundamental machine learning techniques can be app…
Performance Analysis of Scientific Computing Workloads on Trusted Execution Environments
Ayaz Akram, Anna Giannakou, Venkatesh Akella +2
Scientific computing sometimes involves computation on sensitive data. Depending on the data and the execution environment, the HPC (high-performance computing) user or data provid…
The gem5 Simulator: Version 20.0+
Jason Lowe-Power, Abdul Mutaal Ahmad, Ayaz Akram +75
The open-source and community-supported gem5 simulator is one of the most popular tools for computer architecture research. This simulation infrastructure allows researchers to mod…