3 papers
cs.LO2020
Simulation-Guided Boolean Resubstitution
Siang-Yun Lee, Heinz Riener, Alan Mishchenko +2
This paper proposes a new logic optimization paradigm based on circuit simulation, which reduces the need for Boolean computations such as SAT-solving or constructing BDDs. The pap…
cs.LO2007
Efficient Solution of Language Equations Using Partitioned Representations
Alan Mishchenko, Robert Brayton, Roland Jiang +2
A class of discrete event synthesis problems can be reduced to solving language equations f . X ⊆ S, where F is the fixed component and S the specification. Sequential synthes…
cs.LO2007
SAT-Based Complete Don't-Care Computation for Network Optimization
Alan Mishchenko, Robert K. Brayton
This paper describes an improved approach to Boolean network optimization using internal don't-cares. The improvements concern the type of don't-cares computed, their scope, and th…