118 citations · 187 across the 6 of their papers we have counts for
4 papers · 1 filter
PATRONoC: Parallel AXI Transport Reducing Overhead for Networks-on-Chip targeting Multi-Accelerator DNN Platforms at the Edge
Vikram Jain, Matheus Cavalcante, Nazareno Bruschi +6
Emerging deep neural network (DNN) applications require high-performance multi-core hardware acceleration with large data bursts. Classical network-on-chips (NoCs) use serial packe…
A 3 TOPS/W RISC-V Parallel Cluster for Inference of Fine-Grain Mixed-Precision Quantized Neural Networks
Alessandro Nadalini, Georg Rutishauser, Alessio Burrello +5
The emerging trend of deploying complex algorithms, such as Deep Neural Networks (DNNs), increasingly poses strict memory and energy efficiency requirements on Internet-of-Things (…
Scale up your In-Memory Accelerator: Leveraging Wireless-on-Chip Communication for AIMC-based CNN Inference
Nazareno Bruschi, Giuseppe Tagliavini, Francesco Conti +7
Analog In-Memory Computing (AIMC) is emerging as a disruptive paradigm for heterogeneous computing, potentially delivering orders of magnitude better peak performance and efficienc…
Enabling Mixed-Precision Quantized Neural Networks in Extreme-Edge Devices
Nazareno Bruschi, Angelo Garofalo, Francesco Conti +2
The deployment of Quantized Neural Networks (QNN) on advanced microcontrollers requires optimized software to exploit digital signal processing (DSP) extensions of modern instructi…