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20192023
most citedAchieving Super-Linear Speedup across Multi-FPGA for Real-Time DNN Inference

87 citations · 456 across the 39 of their papers we have counts for

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Showing 2019Show all

5 papers · 1 filter

cs.NE2019★ 3 cited

Device-Circuit-Architecture Co-Exploration for Computing-in-Memory Neural Accelerators

Weiwen Jiang, Qiuwen Lou, Zheyu Yan +4

Co-exploration of neural architectures and hardware design is promising to simultaneously optimize network accuracy and hardware efficiency. However, state-of-the-art neural archit…

cs.LG2019★ 59 cited

On Neural Architecture Search for Resource-Constrained Hardware Platforms

Qing Lu, Weiwen Jiang, Xiaowei Xu +2

In the recent past, the success of Neural Architecture Search (NAS) has enabled researchers to broadly explore the design space using learning-based methods. Apart from finding bet…

cs.DC2019★ 87 cited

Achieving Super-Linear Speedup across Multi-FPGA for Real-Time DNN Inference

Weiwen Jiang, Edwin H. -M. Sha, Xinyi Zhang +4

Real-time Deep Neural Network (DNN) inference with low-latency requirement has become increasingly important for numerous applications in both cloud computing (e.g., Apple's Siri)…

cs.LG2019★ 15 cited

Hardware/Software Co-Exploration of Neural Architectures

Weiwen Jiang, Lei Yang, Edwin Sha +5

We propose a novel hardware and software co-exploration framework for efficient neural architecture search (NAS). Different from existing hardware-aware NAS which assumes a fixed h…

cs.DC2019★ 7 cited

Accuracy vs. Efficiency: Achieving Both through FPGA-Implementation Aware Neural Architecture Search

Weiwen Jiang, Xinyi Zhang, Edwin H. -M. Sha +4

A fundamental question lies in almost every application of deep neural networks: what is the optimal neural architecture given a specific dataset? Recently, several Neural Architec…