6 citations · 19 across the 16 of their papers we have counts for
19 papers
Emulated Integrity Replica: Enabling Self-Healing on FPGA SoCs via Hierarchical Twins
Arsalan Ali Malik, Ali Suvizi, Guru Venkataramani +1
Convolutional neural networks (CNNs) are increasingly being deployed on system-on-chip (SoC) platforms, where hardware-accelerated inference enables low-latency edge computing. Ach…
FeatureBleed: Inferring Private Enriched Attributes From Sparsity-Optimized AI Accelerators
Darsh Asher, Farshad Dizani, Joshua Kalyanapu +3
Backend enrichment is now widely deployed in sensitive domains such as product recommendation pipelines, healthcare, and finance, where models are trained on confidential data and…
Preemption-Enhanced Benchmark Suite for FPGAs
Arsalan Ali Malik, John Buchanan, Aydin Aysu
Field-Programmable Gate Arrays (FPGAs) have become essential in cloud computing due to their reconfigurability, energy efficiency, and ability to accelerate domain-specific workloa…
Train to Defend: First Defense Against Cryptanalytic Neural Network Parameter Extraction Attacks
Ashley Kurian, Aydin Aysu
Neural networks are valuable intellectual property due to the significant computational cost, expert labor, and proprietary data involved in their development. Consequently, protec…
GATEBLEED: Exploiting On-Core Accelerator Power Gating for High Performance & Stealthy Attacks on AI
Joshua Kalyanapu, Farshad Dizani, Darsh Asher +4
As power consumption from AI training and inference continues to increase, AI accelerators are being integrated directly into the CPU. Intel's Advanced Matrix Extensions (AMX) is o…
No TPU Left Behind: Retrofitting Side-Channel Protection into Edge TPUs
Ashley Kurian, Anuj Dubey, Modini Ayyagari +1
Side-channel attacks can recover neural network parameters from physical signals, even on commercial edge accelerators. Existing defenses require changes to hardware, instruction s…
SHIFT SNARE: Uncovering Secret Keys in FALCON via Single-Trace Analysis
Jinyi Qiu, Aydin Aysu
This paper presents a novel singletrace sidechannel attack on FALCON a latticebased postquantum digital signature protocol recently approved for standardization by NIST We target t…
Hardware-Enabled Mechanisms for Verifying Responsible AI Development
Aidan O'Gara, Gabriel Kulp, Will Hodgkins +7
Advancements in AI capabilities, driven in large part by scaling up computing resources used for AI training, have created opportunities to address major global challenges but also…
Honest to a Fault: Root-Causing Fault Attacks with Pre-Silicon RISC Pipeline Characterization
Arsalan Ali Malik, Harshvadan Mihir, Aydin Aysu
Fault injection attacks represent a class of threats that can compromise embedded systems across multiple layers of abstraction, such as system software, instruction set architectu…
CRAFT: Characterizing and Root-Causing Fault Injection Threats at Pre-Silicon
Arsalan Ali Malik, Harshvadan Mihir, Aydin Aysu
Fault injection attacks (FIA) pose significant security threats to embedded systems as they exploit weaknesses across multiple layers, including system software, instruction set ar…
EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems
Arsalan Ali Malik, Emre Karabulut, Aydin Aysu
FPGAs are increasingly used in multi-tenant cloud environments to offload compute-intensive tasks from the main CPU. The operating system (OS) plays a vital role in identifying tas…
THEMIS: Time, Heterogeneity, and Energy Minded Scheduling for Fair Multi-Tenant Use in FPGAs
Emre Karabulut, Arsalan Ali Malik, Amro Awad +1
Using correct design metrics and understanding the limitations of the underlying technology is critical to developing effective scheduling algorithms. Unfortunately, existing sched…
Quantum Leak: Timing Side-Channel Attacks on Cloud-Based Quantum Services
Chao Lu, Esha Telang, Aydin Aysu +1
Quantum computing offers significant acceleration capabilities over its classical counterpart in various application domains. Consequently, there has been substantial focus on impr…
Guarding Machine Learning Hardware Against Physical Side-Channel Attacks
Anuj Dubey, Rosario Cammarota, Vikram Suresh +1
Machine learning (ML) models can be trade secrets due to their development cost. Hence, they need protection against malicious forms of reverse engineering (e.g., in IP piracy). Wi…
Trustworthy AI Inference Systems: An Industry Research View
Rosario Cammarota, Matthias Schunter, Anand Rajan +26
In this work, we provide an industry research view for approaching the design, deployment, and operation of trustworthy Artificial Intelligence (AI) inference systems. Such systems…
BoMaNet: Boolean Masking of an Entire Neural Network
Anuj Dubey, Rosario Cammarota, Aydin Aysu
Recent work on stealing machine learning (ML) models from inference engines with physical side-channel attacks warrant an urgent need for effective side-channel defenses. This work…
Efficacy of Satisfiability Based Attacks in the Presence of Circuit Reverse Engineering Errors
Qinhan Tan, Seetal Potluri, Aydin Aysu
Intellectual Property (IP) theft is a serious concern for the integrated circuit (IC) industry. To address this concern, logic locking countermeasure transforms a logic circuit to…
SeqL: Secure Scan-Locking for IP Protection
Seetal Potluri, Aydin Aysu, Akash Kumar
Existing logic-locking attacks are known to successfully decrypt functionally correct key of a locked combinational circuit. It is possible to extend these attacks to real-world Si…
MaskedNet: The First Hardware Inference Engine Aiming Power Side-Channel Protection
Anuj Dubey, Rosario Cammarota, Aydin Aysu
Differential Power Analysis (DPA) has been an active area of research for the past two decades to study the attacks for extracting secret information from cryptographic implementat…