17 citations · 28 across the 10 of their papers we have counts for
10 papers
The Road Less Traveled: Congestion-Aware NoC Placement and Packet Routing for FPGAs
Soheil Gholami Shahrouz, Vaughn Betz
To help scale to ever-larger and more complex designs, recent FPGA architectures now integrate network-on-chips (NoCs). NoCs help transfer high-bandwidth data over long distances w…
Jack of All Scales: A Versatile FPGA Tensor Block for MXFP Precisions
Marwan Mekhemer, Ahmed Elsousy, Balaji Venkatesh +4
Modern deep learning workloads increasingly rely on narrow numerical formats to improve efficiency and reduce memory footprint. The recently standardized microscaling floating-poin…
Modeling, Optimizing and Exploring Multi-Die FPGA Routing Architectures
Amirhossein Poolad, Soheil Gholami Shahrouz, Andrew Boutros +1
Die stacking has enabled 2.5D FPGAs by integrating multiple active dice on a passive silicon interposer for improved yield and capacity, and paved the way for 3D architectures that…
Double Duty: FPGA Architecture to Enable Concurrent LUT and Adder Chain Usage
Junius Pun, Xilai Dai, Grace Zgheib +4
Flexibility and customization are key strengths of Field-Programmable Gate Arrays (FPGAs) when compared to other computing devices. For instance, FPGAs can efficiently implement ar…
H2PIPE: High throughput CNN Inference on FPGAs with High-Bandwidth Memory
Mario Doumet, Marius Stan, Mathew Hall +1
Convolutional Neural Networks (CNNs) combine large amounts of parallelizable computation with frequent memory access. Field Programmable Gate Arrays (FPGAs) can achieve low latency…
Field-Programmable Gate Array Architecture for Deep Learning: Survey & Future Directions
Andrew Boutros, Aman Arora, Vaughn Betz
Deep learning (DL) is becoming the cornerstone of numerous applications both in datacenters and at the edge. Specialized hardware is often necessary to meet the performance require…
RAD-Sim: Rapid Architecture Exploration for Novel Reconfigurable Acceleration Devices
Andrew Boutros, Eriko Nurvitadhi, Vaughn Betz
With the continued growth in field-programmable gate array (FPGA) capacity and their incorporation into new environments such as datacenters, we have witnessed the introduction of…
Koios: A Deep Learning Benchmark Suite for FPGA Architecture and CAD Research
Aman Arora, Andrew Boutros, Daniel Rauch +9
With the prevalence of deep learning (DL) in many applications, researchers are investigating different ways of optimizing FPGA architecture and CAD to achieve better quality-of-re…
Neighbors From Hell: Voltage Attacks Against Deep Learning Accelerators on Multi-Tenant FPGAs
Andrew Boutros, Mathew Hall, Nicolas Papernot +1
Field-programmable gate arrays (FPGAs) are becoming widely used accelerators for a myriad of datacenter applications due to their flexibility and energy efficiency. Among these app…
HPIPE: Heterogeneous Layer-Pipelined and Sparse-Aware CNN Inference for FPGAs
Mathew Hall, Vaughn Betz
We present both a novel Convolutional Neural Network (CNN) accelerator architecture and a network compiler for FPGAs that outperforms all prior work. Instead of having generic proc…