4 citations · 18 across the 6 of their papers we have counts for
6 papers
Accelerating Graph Analytics on a Reconfigurable Architecture with a Data-Indirect Prefetcher
Yichen Yang, Jingtao Li, Nishil Talati +5
The irregular nature of memory accesses of graph workloads makes their performance poor on modern computing platforms. On manycore reconfigurable architectures (MRAs), in particula…
xURLCC in 6g with meshed RAN
Mohammad Ali Khoshkholghi, Toktam Mahmoodi, Subhankar Pal +3
5G Ultra-Reliable Low Latency Communications Technology (URLLC) will not be able to provide extremely reliable low latency services to the complex networks in 6G. Moreover, URLLC t…
Efficient Pruning for Machine Learning Under Homomorphic Encryption
Ehud Aharoni, Moran Baruch, Pradip Bose +8
Privacy-preserving machine learning (PPML) solutions are gaining widespread popularity. Among these, many rely on homomorphic encryption (HE) that offers confidentiality of the mod…
HetSched: Quality-of-Mission Aware Scheduling for Autonomous Vehicle SoCs
Aporva Amarnath, Subhankar Pal, Hiwot Kassa +6
Systems-on-Chips (SoCs) that power autonomous vehicles (AVs) must meet stringent performance and safety requirements prior to deployment. With increasing complexity in AV applicati…
Versa: A Dataflow-Centric Multiprocessor with 36 Systolic ARM Cortex-M4F Cores and a Reconfigurable Crossbar-Memory Hierarchy in 28nm
Sung Kim, Morteza Fayazi, Alhad Daftardar +10
We present Versa, an energy-efficient processor with 36 systolic ARM Cortex-M4F cores and a runtime-reconfigurable memory hierarchy. Versa exploits algorithm-specific characteristi…
STOMP: A Tool for Evaluation of Scheduling Policies in Heterogeneous Multi-Processors
Augusto Vega, Aporva Amarnath, John-David Wellman +6
The proliferation of heterogeneous chip multiprocessors in recent years has reached unprecedented levels. Traditional homogeneous platforms have shown fundamental limitations when…