7 citations · 25 across the 17 of their papers we have counts for
17 papers
CHOSEN: Compilation to Hardware Optimization Stack for Efficient Vision Transformer Inference
Mohammad Erfan Sadeghi, Arash Fayyazi, Suhas Somashekar +2
Vision Transformers (ViTs) represent a groundbreaking shift in machine learning approaches to computer vision. Unlike traditional approaches, ViTs employ the self-attention mechani…
PEANO-ViT: Power-Efficient Approximations of Non-Linearities in Vision Transformers
Mohammad Erfan Sadeghi, Arash Fayyazi, Seyedarmin Azizi +1
The deployment of Vision Transformers (ViTs) on hardware platforms, specially Field-Programmable Gate Arrays (FPGAs), presents many challenges, which are mainly due to the substant…
Scalable Superconductor Neuron with Ternary Synaptic Connections for Ultra-Fast SNN Hardware
Mustafa Altay Karamuftuoglu, Beyza Zeynep Ucpinar, Arash Fayyazi +3
A novel high-fan-in differential superconductor neuron structure designed for ultra-high-performance Spiking Neural Network (SNN) accelerators is presented. Utilizing a high-fan-in…
Sensitivity-Aware Mixed-Precision Quantization and Width Optimization of Deep Neural Networks Through Cluster-Based Tree-Structured Parzen Estimation
Seyedarmin Azizi, Mahdi Nazemi, Arash Fayyazi +1
As the complexity and computational demands of deep learning models rise, the need for effective optimization methods for neural network designs becomes paramount. This work introd…
NeuroBlend: Towards Low-Power yet Accurate Neural Network-Based Inference Engine Blending Binary and Fixed-Point Convolutions
Arash Fayyazi, Mahdi Nazemi, Arya Fayyazi +1
This paper introduces NeuroBlend, a novel neural network architecture featuring a unique building block known as the Blend module. This module incorporates binary and fixed-point c…
CrAFT: Compression-Aware Fine-Tuning for Efficient Visual Task Adaptation
Jung Hwan Heo, Seyedarmin Azizi, Arash Fayyazi +1
Transfer learning has become a popular task adaptation method in the era of foundation models. However, many foundation models require large storage and computing resources, which…
Algorithms and Hardware for Efficient Processing of Logic-based Neural Networks
Jingkai Hong, Arash Fayyazi, Amirhossein Esmaili +2
Recent efforts to improve the performance of neural network (NN) accelerators that meet today's application requirements have given rise to a new trend of logic-based NN inference…
Training-Free Acceleration of ViTs with Delayed Spatial Merging
Jung Hwan Heo, Seyedarmin Azizi, Arash Fayyazi +1
Token merging has emerged as a new paradigm that can accelerate the inference of Vision Transformers (ViTs) without any retraining or fine-tuning. To push the frontier of training-…
Better Than Worst-Case Decoding for Quantum Error Correction
Gokul Subramanian Ravi, Jonathan M. Baker, Arash Fayyazi +4
The overheads of classical decoding for quantum error correction on superconducting quantum systems grow rapidly with the number of logical qubits and their correction code distanc…
Efficient Compilation and Mapping of Fixed Function Combinational Logic onto Digital Signal Processors Targeting Neural Network Inference and Utilizing High-level Synthesis
Soheil Nazar Shahsavani, Arash Fayyazi, Mahdi Nazemi +1
Recent efforts for improving the performance of neural network (NN) accelerators that meet today's application requirements have given rise to a new trend of logic-based NN inferen…
Sparse Periodic Systolic Dataflow for Lowering Latency and Power Dissipation of Convolutional Neural Network Accelerators
Jung Hwan Heo, Arash Fayyazi, Amirhossein Esmaili +1
This paper introduces the sparse periodic systolic (SPS) dataflow, which advances the state-of-the-art hardware accelerator for supporting lightweight neural networks. Specifically…
NullaNet Tiny: Ultra-low-latency DNN Inference Through Fixed-function Combinational Logic
Mahdi Nazemi, Arash Fayyazi, Amirhossein Esmaili +3
While there is a large body of research on efficient processing of deep neural networks (DNNs), ultra-low-latency realization of these models for applications with stringent, sub-m…
SynergicLearning: Neural Network-Based Feature Extraction for Highly-Accurate Hyperdimensional Learning
Mahdi Nazemi, Amirhossein Esmaili, Arash Fayyazi +1
Machine learning models differ in terms of accuracy, computational/memory complexity, training time, and adaptability among other characteristics. For example, neural networks (NNs…
HIPE-MAGIC: A Technology-Aware Synthesis and Mapping Flow for HIghly Parallel Execution of Memristor-Aided LoGIC
Arash Fayyazi, Amirhossein Esmaili, Massoud Pedram
Recent efforts for finding novel computing paradigms that meet today's design requirements have given rise to a new trend of processing-in-memory relying on non-volatile memories.…
Logic Verification of Ultra-Deep Pipelined Beyond-CMOS Technologies
Arash Fayyazi, Shahin Nazarian, Massoud Pedram
Traditional logical equivalence checking (LEC) which plays a major role in entire chip design process faces challenges of meeting the requirements demanded by the many emerging tec…
VeriSFQ - A Semi-formal Verification Framework and Benchmark for Single Flux Quantum Technology
Alvin D. Wong, Kevin Su, Hang Sun +3
In this paper, we propose a semi-formal verification framework for single-flux quantum (SFQ) circuits called VeriSFQ, using the Universal Verification Methodology (UVM) standard. T…
SpRRAM: A Predefined Sparsity Based Memristive Neuromorphic Circuit for Low Power Application
Arash Fayyazi, Souvik Kundu, Shahin Nazarian +2
In this paper, we propose an efficient predefined structured sparsity-based ex-situ training framework for a hybrid CMOS-memristive neuromorphic hardware for deep neural network to…