12 citations · 17 across the 8 of their papers we have counts for
8 papers
Machine Learning for Microprocessor Performance Bug Localization
Erick Carvajal Barboza, Mahesh Ketkar, Michael Kishinevsky +2
The validation process for microprocessors is a very complex task that consumes substantial engineering time during the design process. Bugs that degrade overall system performance…
Machine Learning-based Low Overhead Congestion Control Algorithm for Industrial NoCs
Shruti Yadav Narayana, Sumit K. Mandal, Raid Ayoub +2
Network-on-Chip (NoC) congestion builds up during heavy traffic load and cripples the system performance by stalling the cores. Moreover, congestion leads to wasted link bandwidth…
Theoretical Analysis and Evaluation of NoCs with Weighted Round-Robin Arbitration
Sumit K. Mandal, Jie Tong, Raid Ayoub +3
Fast and accurate performance analysis techniques are essential in early design space exploration and pre-silicon evaluations, including software eco-system development. In particu…
Automatic Microprocessor Performance Bug Detection
Erick Carvajal Barboza, Sara Jacob, Mahesh Ketkar +3
Processor design validation and debug is a difficult and complex task, which consumes the lion's share of the design process. Design bugs that affect processor performance rather t…
Online Adaptive Learning for Runtime Resource Management of Heterogeneous SoCs
Sumit K. Mandal, Umit Y. Ogras, Janardhan Rao Doppa +3
Dynamic resource management has become one of the major areas of research in modern computer and communication system design due to lower power consumption and higher performance d…
Performance Analysis of Priority-Aware NoCs with Deflection Routing under Traffic Congestion
Sumit K. Mandal, Anish Krishnakumar, Raid Ayoub +2
Priority-aware networks-on-chip (NoCs) are used in industry to achieve predictable latency under different workload conditions. These NoCs incorporate deflection routing to minimiz…
An Online Learning Methodology for Performance Modeling of Graphics Processors
Ujjwal Gupta, Manoj Babu, Raid Ayoub +4
Approximately 18 percent of the 3.2 million smartphone applications rely on integrated graphics processing units (GPUs) to achieve competitive performance. Graphics performance, ty…
Analytical Performance Models for NoCs with Multiple Priority Traffic Classes
Sumit K. Mandal, Raid Ayoub, Michael Kishinevsky +1
Networks-on-chip (NoCs) have become the standard for interconnect solutions in industrial designs ranging from client CPUs to many-core chip-multiprocessors. Since NoCs play a vita…