1 citations · 3 across the 4 of their papers we have counts for
5 papers
Mitigating the Latency-Area Tradeoffs for DRAM Design with Coarse-Grained Monolithic 3D (M3D) Integration
Chao-Hsuan Huang, Ishan G Thakkar
Over the years, the DRAM latency has not scaled proportionally with its density due to the cost-centric mindset of the DRAM industry. Prior work has shown that this shortcoming can…
PROTEUS: Rule-Based Self-Adaptation in Photonic NoCs for Loss-Aware Co-Management of Laser Power and Performance
Sairam Sri Vatsavai, Venkata Sai Praneeth Karempudi, Ishan Thakkar
The performance of on-chip communication in the state-of-the-art multi-core processors that use the traditional electron-ic NoCs has already become severely energy-constrained. To…
Exploiting Process Variations to Secure Photonic NoC Architectures from Snooping Attacks
Sai Vineel Reddy Chittamuru, Ishan G Thakkar, Sudeep Pasricha +2
The compact size and high wavelength-selectivity of microring resonators (MRs) enable photonic networks-on-chip (PNoCs) to utilize dense-wavelength-division-multiplexing (DWDM) in…
Redesigning Photonic Interconnects with Silicon-on-Sapphire Device Platform for Ultra-Low-Energy On-Chip Communication
Venkata Sai Praneeth Karempudi, Sairam Sri Vatsavai, Ishan Thakkar
Traditional silicon-on-insulator (SOI) platform based on-chip photonic interconnects have limited energy-bandwidth scalability due to the optical non-linearity induced power constr…
LORAX: Loss-Aware Approximations for Energy-Efficient Silicon Photonic Networks-on-Chip
Febin Sunny, Asif Mirza, Ishan Thakkar +2
The approximate computing paradigm advocates for relaxing accuracy goals in applications to improve energy-efficiency and performance. Recently, this paradigm has been explored to…