3 citations · 3 across the 2 of their papers we have counts for
6 papers
Speculative Path Planning
Mohammad Bakhshalipour, Mohamad Qadri, Dominic Guri
Parallelization of A* path planning is mostly limited by the number of possible motions, which is far less than the level of parallelism that modern processors support. In this pap…
A Survey on Recent Hardware Data Prefetching Approaches with An Emphasis on Servers
Mohammad Bakhshalipour, Mehran Shakerinava, Fatemeh Golshan +3
Data prefetching, i.e., the act of predicting application's future memory accesses and fetching those that are not in the on-chip caches, is a well-known and widely-used approach t…
Die-Stacked DRAM: Memory, Cache, or MemCache?
Mohammad Bakhshalipour, HamidReza Zare, Pejman Lotfi-Kamran +1
Die-stacked DRAM is a promising solution for satisfying the ever-increasing memory bandwidth requirements of multi-core processors. Manufacturing technology has enabled stacking se…
Making Belady-Inspired Replacement Policies More Effective Using Expected Hit Count
Seyed Armin Vakil Ghahani, Sara Mahdizadeh Shahri, Mohammad Bakhshalipour +2
Memory-intensive workloads operate on massive amounts of data that cannot be captured by last-level caches (LLCs) of modern processors. Consequently, processors encounter frequent…
Scale-Out Processors & Energy Efficiency
Pouya Esmaili-Dokht, Mohammad Bakhshalipour, Behnam Khodabandeloo +2
Scale-out workloads like media streaming or Web search serve millions of users and operate on a massive amount of data, and hence, require enormous computational power. As the numb…
Parallelizing Bisection Root-Finding: A Case for Accelerating Serial Algorithms in Multicore Substrates
Mohammad Bakhshalipour, Hamid Sarbazi-Azad
Multicore architectures dominate today's processor market. Even though the number of cores and threads are pretty high and continues to grow, inherently serial algorithms do not be…