activity
20202024
most citedConfuciuX: Autonomous Hardware Resource Assignment for DNN Accelerators using Reinforcement Learning

10 citations · 14 across the 11 of their papers we have counts for

collaborators

11 papers

cs.LG2024

SDQ: Sparse Decomposed Quantization for LLM Inference

Geonhwa Jeong, Po-An Tsai, Stephen W. Keckler +1

Recently, large language models (LLMs) have shown surprising performance in task-specific workloads as well as general tasks with the given prompts. However, to achieve unprecedent…

cs.AR2024★ 1 cited

Demystifying AI Platform Design for Distributed Inference of Next-Generation LLM models

Abhimanyu Bambhaniya, Ritik Raj, Geonhwa Jeong +6

Large language models (LLMs) have shown remarkable performance across a wide range of applications, often outperforming human experts. However, deploying these gigantic models effi…

cs.AR2024

Algorithm-Hardware Co-Design of Distribution-Aware Logarithmic-Posit Encodings for Efficient DNN Inference

Akshat Ramachandran, Zishen Wan, Geonhwa Jeong +2

Traditional Deep Neural Network (DNN) quantization methods using integer, fixed-point, or floating-point data types struggle to capture diverse DNN parameter distributions at low p…

cs.LG2024★ 1 cited

Enabling Unstructured Sparse Acceleration on Structured Sparse Accelerators

Geonhwa Jeong, Po-An Tsai, Abhimanyu R. Bambhaniya +2

Exploiting sparsity in deep neural networks (DNNs) has been a promising area for meeting the growing computation requirements. To minimize the overhead of sparse acceleration, hard…

cs.LG2024★ 1 cited

GEAR: An Efficient KV Cache Compression Recipe for Near-Lossless Generative Inference of LLM

Hao Kang, Qingru Zhang, Souvik Kundu +4

Key-value (KV) caching has become the de-facto to accelerate generation speed for large language models (LLMs) inference. However, the growing cache demand with increasing sequence…

cs.AR2023★ 1 cited

VEGETA: Vertically-Integrated Extensions for Sparse/Dense GEMM Tile Acceleration on CPUs

Geonhwa Jeong, Sana Damani, Abhimanyu Rajeshkumar Bambhaniya +5

Deep Learning (DL) acceleration support in CPUs has recently gained a lot of traction, with several companies (Arm, Intel, IBM) announcing products with specialized matrix engines…

cs.AR2021

RASA: Efficient Register-Aware Systolic Array Matrix Engine for CPU

Geonhwa Jeong, Eric Qin, Ananda Samajdar +4

As AI-based applications become pervasive, CPU vendors are starting to incorporate matrix engines within the datapath to boost efficiency. Systolic arrays have been the premier arc…

cs.AR2021

Union: A Unified HW-SW Co-Design Ecosystem in MLIR for Evaluating Tensor Operations on Spatial Accelerators

Geonhwa Jeong, Gokcen Kestor, Prasanth Chatarasi +5

To meet the extreme compute demands for deep learning across commercial and scientific applications, dataflow accelerators are becoming increasingly popular. While these "domain-sp…

cs.DC2021

Evaluating Spatial Accelerator Architectures with Tiled Matrix-Matrix Multiplication

Gordon E. Moon, Hyoukjun Kwon, Geonhwa Jeong +3

There is a growing interest in custom spatial accelerators for machine learning applications. These accelerators employ a spatial array of processing elements (PEs) interacting via…

cs.DC2021

Extending Sparse Tensor Accelerators to Support Multiple Compression Formats

Eric Qin, Geonhwa Jeong, William Won +7

Sparsity, which occurs in both scientific applications and Deep Learning (DL) models, has been a key target of optimization within recent ASIC accelerators due to the potential mem…

cs.AR2020★ 10 cited

ConfuciuX: Autonomous Hardware Resource Assignment for DNN Accelerators using Reinforcement Learning

Sheng-Chun Kao, Geonhwa Jeong, Tushar Krishna

DNN accelerators provide efficiency by leveraging reuse of activations/weights/outputs during the DNN computations to reduce data movement from DRAM to the chip. The reuse is captu…