23 citations · 183 across the 33 of their papers we have counts for
33 papers
Characteristics of Ge-doped Multi-Mode Fibers in Total Ionizing Dose
Datao Gong, Suen Hou, Bo-Jing Juang +9
Purpose: The fiber optical links in 850 nm band with Ge-doped multi-mode (MM) fibers are well developed for data transmission at 10 Gbps and higher. The applications in nuclear env…
ETROC1: The First Full Chain Precision Timing Prototype ASIC for CMS MTD Endcap Timing Layer Upgrade
Xing Huang, Quan Sun, Datao Gong +16
We present the design and characterization of the first full chain precision timing prototype ASIC, named ETL Readout Chip version 1 (ETROC1) for the CMS MTD endcap timing layer (E…
The 120Gbps VCSEL Array Based Optical Transmitter (ATx) Development for the High-Luminosity LHC (HL-LHC) Experiments
Di Guo, Chonghan Liu, Jinghong Chen +18
The integration of a Verticle Cavity Surface-Emitting Laser (VCSEL) array and a driving Application-Specific Integrated Circuit (ASIC) in a custom optical array transmitter module…
Optical Data Transmission ASICs for the High-Luminosity LHC (HL-LHC) Experiments
Xiaoting Li, Gang Liu, Jinghong Chen +17
We present the design and test results of two optical data transmission ASICs for the High-Luminosity LHC (HL-LHC) experiments. These ASICs include a two-channel serializer (LOCs2)…
The Design of a High Speed Low Power Phase Locked Loop
Tiankuan Liu, Datao Gong, Suen Hou +6
The upgrade of the ATLAS Liquid Argon Calorimeter readout system calls for the development of radiation tolerant, high speed and low power serializer ASIC. We have designed a phase…
Development of A 16:1 serializer for data transmission at 5 Gbps
Datao Gong, Suen Hou, Zhihua Liang +6
Radiation tolerant, high speed and low power serializer ASIC is critical for optical link systems in particle physics experiments. Based on a commercial 0.25 um silicon-on-sapphire…
High-Speed Serial Optical Link Test Bench Using FPGA with Embedded Transceivers
Annie C. Xiang, Tingting Cao, Datao Gong +6
We develop a custom Bit Error Rate test bench based on Altera's Stratix II GX transceiver signal integrity development kit, demonstrate it on point-to-point serial optical link wit…
The Clock Distribution System for the ATLAS Liquid Argon Calorimeter Phase-I Upgrade Demonstrator
Binwei Deng, Hucheng Chen, Kai Chen +14
A prototype Liquid-argon Trigger Digitizer Board (LTDB), called the LTDB Demonstrator, has been developed to demonstrate the functions of the ATLAS Liquid Argon Calorimeter Phase-I…
The VCSEL-based Array Optical Transmitter (ATx) Development Towards 120-Gbps Link for Collider Detector: Development Update
Di Guo, Chonghan Liu, Jinghong Chen +14
A compact radiation-tolerant array optical transmitter module (ATx) is developed to provide data transmission up to 10Gbps per channel with 12 parallel channels for collider detect…
JTAG-based Remote Configuration of FPGAs over Optical Fibers
Binwei Deng, Chonghan Liu, Jinghong Chen +12
In this paper, a remote FPGA-configuration method based on JTAG extension over optical fibers is presented. The method takes advantage of commercial components and ready-to-use sof…
MUX64, an analogue 64-to-1 multiplexer ASIC for the ATLAS High Granularity Timing Detector
Zifeng Xu, Li Zhang, Xing Huang +11
We present the design and the performance of MUX64, a 64-to-1 analogue multiplexer ASIC for the ATLAS High Granularity Timing Detector (HGTD). The MUX64 transmits one of its 64 inp…
Response of a Commercial 0.25 um Thin-Film Silicon-on-Sapphire CMOS Technology to Total Ionizing Dose
Michael P. King, Datao Gong, Chonghan Liu +7
The radiation response of a 0.25 um silicon-on-sapphire CMOS technology is characterized at the transistor and circuit levels utilizing both standard and enclosed layout devices. D…
Optical Links for ATLAS Liquid Argon Calorimeter Front-end Electronics Readout
Tiankuan Liu
We present the optical data links for the ATLAS liquid argon calorimeter. The current status of the vertical cavity surface emitting laser failures, the up-to-date results in searc…
A 4.9-GHz Low Power, Low Jitter, LC Phase Locked Loop
Tiankuan Liu
This paper presents a low power, low jitter LC phase locked loop (PLL) which has been designed and fabricated in a commercial 0.25-um Silicon-on-Sapphire CMOS technology. Random ji…
R&D Towards Cryogenic Optical Links
Mark Christiansen, Raphael Galea, Datao Gong +17
A number of critical active and passive components of optical links have been tested at 77 K or lower temperatures, demonstrating potential development of optical links operating i…
Cryogenic digital data links for the liquid argon time projection chamber
Tiankuan Liu, Datao Gong, Suen Hou +5
In this paper we present the cryogenic functionality of the components of data links for the Liquid Argon Time Projection Chamber (LArTPC), a potential far site detector technology…
The Miniature Optical Transmitter and Transceiver For the High-Luminosity LHC (HL-LHC) experiments
Chonghan Liu, Xiandong Zhao, Jinghong Chen +12
We present the design and test results of the Miniature optical Transmitter (MTx) and Transceiver (MTRx) for the high luminosity LHC (HL-LHC) experiments. MTx and MTRx are Transmit…
A line code with quick-resynchronization capability and low latency for the optical data links of LHC experiments
Binwei Deng, Mengxun He, Jinghong Chen +10
We propose a line code that has fast resynchronization capability and low latency. Both the encoder and decoder have been implemented in FPGAs. The encoder has also been implemente…
Component Prototypes towards a Low-Latency, Small-form-factor Optical Link for the ATLAS Liquid Argon Calorimeter Phase-I Trigger Upgrade
Binwei Deng, Mengxun He, Jinghong Chen +14
This paper presents several component prototypes towards a low-latency, small-form-factor optical link designed for the ATLAS Liquid Argon Calorimeter Phase-I trigger upgrade. A pr…
The Analog Front-end for the LGAD Based Precision Timing Application in CMS ETL
Quan Sun, Sunil M. Dogra, Christopher Edwards +20
The analog front-end for the Low Gain Avalanche Detector (LGAD) based precision timing application in the CMS Endcap Timing Layer (ETL) has been prototyped in a 65 nm CMOS mini-ASI…
A Low-Power Time-to-Digital Converter for the CMS Endcap Timing Layer (ETL) Upgrade
Wei Zhang, Hanhan Sun, Christopher Edwards +11
We present the design and test results of a Time-to-Digital-Converter (TDC). The TDC will be a part of the readout ASIC, called ETROC, to read out Low-Gain Avalanche Detectors (LGA…
A 10 Gbps Driver/Receiver ASIC and Optical Modules for Particle Physics Experiments
Xing Huang, Datao Gong, Suen Hou +10
We present the design and test results of a Drivers and Limiting AmplifierS ASIC operating at 10 Gbps (DLAS10) and three Miniature Optical Transmitter/Receiver/Transceiver modules…
A 20 Gbps Data Transmitting ASIC with PAM4 for Particle Physics Experiments
Li Zhang, Datao Gong, Suen Hou +9
We present the design principle and test results of a data transmitting ASIC, GBS20, for particle physics experiments. The goal of GBS20 will be an ASIC that employs two serializer…
Development of ATLAS Liquid Argon Calorimeter Front-end Electronics for the HL-LHC
Tiankuan Liu
The high-luminosity phase of the Large Hadron Collider will provide 5-7 times greater luminosities than assumed in the original detector design. An improved trigger system requires…