activity
20202023
most citedNEUROPULS: NEUROmorphic energy-efficient secure accelerators based on Phase change materials aUgmented siLicon photonicS

5 citations · 10 across the 6 of their papers we have counts for

collaborators

6 papers

cs.CR2023★ 1 cited

Security layers and related services within the Horizon Europe NEUROPULS project

Fabio Pavanello, Cedric Marchand, Paul Jimenez +17

In the contemporary security landscape, the incorporation of photonics has emerged as a transformative force, unlocking a spectrum of possibilities to enhance the resilience and ef…

cs.AR2023★ 5 cited

NEUROPULS: NEUROmorphic energy-efficient secure accelerators based on Phase change materials aUgmented siLicon photonicS

Fabio Pavanello, Cedric Marchand, Ian O'Connor +34

This special session paper introduces the Horizon Europe NEUROPULS project, which targets the development of secure and energy-efficient RISC-V interfaced neuromorphic accelerators…

cs.DC2023★ 4 cited

Validation, Verification, and Testing (VVT) of future RISC-V powered cloud infrastructures: the Vitamin-V Horizon Europe Project perspective

Marti Alonso, David Andreu, Ramon Canal +10

Vitamin-V is a project funded under the Horizon Europe program for the period 2023-2025. The project aims to create a complete open-source software stack for RISC-V that can be use…

cs.DC2023

Vitamin-V: Virtual Environment and Tool-boxing for Trustworthy Development of RISC-V based Cloud Services

A. Arelakis, J. M. Arnau, J. L. Berral +20

Vitamin-V is a 2023-2025 Horizon Europe project that aims to develop a complete RISC-V open-source software stack for cloud services with comparable performance to the cloud-domina…

cs.AR2021

SynCron: Efficient Synchronization Support for Near-Data-Processing Architectures

Christina Giannoula, Nandita Vijaykumar, Nikela Papadopoulou +7

Near-Data-Processing (NDP) architectures present a promising way to alleviate data movement costs and can provide significant performance and energy benefits to parallel applicatio…

cs.AR2020

Enabling Virtual Memory Research on RISC-V with a Configurable TLB Hierarchy for the Rocket Chip Generator

Nikolaos Charalampos Papadopoulos, Vasileios Karakostas, Konstantinos Nikas +2

The Rocket Chip Generator uses a collection of parameterized processor components to produce RISC-V-based SoCs. It is a powerful tool that can produce a wide variety of processor d…