60 citations · 222 across the 56 of their papers we have counts for
17 papers · 1 filter
DCC: Data-Centric Compilation of Machine Learning Kernels for Processing-In-Memory Architectures
Peiming Yang, Sankeerth Durvasula, Ivan Fernandez +4
High-performance Host processors can integrate Processing-In-Memory (PIM) devices, which can accelerate memory-intensive kernels of Machine Learning (ML) models, including Large La…
In-DRAM True Random Number Generation Using Simultaneous Multiple-Row Activation: An Experimental Study of Real DRAM Chips
Ismail Emir Yuksel, Ataberk Olgun, F. Nisa Bostanci +5
In this work, we experimentally demonstrate that it is possible to generate true random numbers at high throughput and low latency in commercial off-the-shelf (COTS) DRAM chips by…
TeraAgent: A Distributed Agent-Based Simulation Engine for Simulating Half a Trillion Agents
Lukas Breitwieser, Ahmad Hesam, Abdullah Giray Yağlıkçı +3
Agent-based simulation is a method for studying highly complex systems in disciplines as diverse as biology, medicine, sociology, economics, finance, and more. In this method, an a…
MARS: Processing-In-Memory Acceleration of Raw Signal Genome Analysis Inside the Storage Subsystem
Melina Soysal, Konstantina Koliogeorgi, Can Firtina +8
Raw signal genome analysis (RSGA) has emerged as a promising approach to enable real-time genome analysis by directly analyzing raw electrical signals. However, rapid advancements…
PuDHammer: Experimental Analysis of Read Disturbance Effects of Processing-using-DRAM in Real DRAM Chips
Ismail Emir Yuksel, Akash Sood, Ataberk Olgun +6
Processing-using-DRAM (PuD) is a promising paradigm for alleviating the data movement bottleneck using DRAM's massive internal parallelism and bandwidth to execute very wide operat…
REIS: A High-Performance and Energy-Efficient Retrieval System with In-Storage Processing
Kangqi Chen, Andreas Kosmas Kakolyris, Rakesh Nadig +7
Large Language Models (LLMs) face an inherent challenge: their knowledge is confined to the data that they have been trained on. To overcome this issue, Retrieval-Augmented Generat…
Processing-in-memory for genomics workloads
William Andrew Simon, Leonid Yavits, Konstantina Koliogeorgi +12
Low-cost, high-throughput DNA and RNA sequencing (HTS) data is the backbone of the life sciences. Genome sequencing is now becoming a part of Predictive, Preventive, Personalized,…
Accelerating Triangle Counting with Real Processing-in-Memory Systems
Lorenzo Asquini, Manos Frouzakis, Juan Gómez-Luna +3
Triangle Counting (TC) is a procedure that involves enumerating the number of triangles within a graph. It has important applications in numerous fields, such as social or biologic…
PIMDAL: Mitigating the Memory Bottleneck in Data Analytics using a Real Processing-in-Memory System
Manos Frouzakis, Juan Gómez-Luna, Geraldo F. Oliveira +2
Database Management Systems (DBMSs) are crucial for efficient data management and analytics, and are used in several different application domains. Due to the increasing volume of…
SAGe: A Lightweight Algorithm-Architecture Co-Design for Mitigating the Data Preparation Bottleneck in Large-Scale Genome Sequence Analysis
Nika Mansouri Ghiasi, Talu Güloglu, Harun Mustafa +8
Genome sequence analysis, which examines the DNA sequences of organisms, drives advances in many critical medical and biotechnological fields. Given its importance and the exponent…
CIPHERMATCH: Accelerating Homomorphic Encryption-Based String Matching via Memory-Efficient Data Packing and In-Flash Processing
Mayank Kabra, Rakesh Nadig, Harshita Gupta +7
Homomorphic encryption (HE) allows secure computation on encrypted data without revealing the original data, providing significant benefits for privacy-sensitive applications. Many…
Harmonia: Enhancing Data Placement and Migration in Hybrid Storage Systems via Multi-Agent Reinforcement Learning
Rakesh Nadig, Vamanan Arulchelvan, Rahul Bera +7
Modern high-performance computing (HPC) environments rely on hybrid storage systems (HSS) that combine multiple storage devices with diverse latency, bandwidth, endurance, and capa…
Understanding and Mitigating Covert Channel and Side Channel Vulnerabilities Introduced by RowHammer Defenses
F. Nisa Bostancı, Oğuzhan Canpolat, Ataberk Olgun +5
DRAM chips are vulnerable to read disturbance phenomena (e.g., RowHammer and RowPress), where repeatedly accessing or keeping open a DRAM row causes bitflips in nearby rows. Attack…
PAPI: Exploiting Dynamic Parallelism in Large Language Model Decoding with a Processing-In-Memory-Enabled Computing System
Yintao He, Haiyu Mao, Christina Giannoula +6
Large language models (LLMs) are widely used for natural language understanding and text generation. An LLM model relies on a time-consuming step called LLM decoding to generate ou…
Ariadne: A Hotness-Aware and Size-Adaptive Compressed Swap Technique for Fast Application Relaunch and Reduced CPU Usage on Mobile Devices
Yu Liang, Aofeng Shen, Chun Jason Xue +9
Growing application memory demands and concurrent usage are making mobile device memory scarce. When memory pressure is high, current mobile systems use a RAM-based compressed swap…
Understanding RowHammer Under Reduced Refresh Latency: Experimental Analysis of Real DRAM Chips and Implications on Future Solutions
Yahya Can Tuğrul, A. Giray Yağlıkçı, İsmail Emir Yüksel +6
RowHammer is a major read disturbance mechanism in DRAM where repeatedly accessing (hammering) a row of DRAM cells (DRAM row) induces bitflips in physically nearby DRAM rows (victi…
Proteus: Enabling High-Performance Processing-Using-DRAM with Dynamic Bit-Precision, Adaptive Data Representation, and Flexible Arithmetic
Geraldo F. Oliveira, Mayank Kabra, Yuxin Guo +8
Processing-using-DRAM (PUD) is a paradigm where the analog operational properties of DRAM are used to perform bulk logic operations. While PUD promises high throughput at low energ…