15 citations · 19 across the 9 of their papers we have counts for
4 papers · 1 filter
EPAC: The Last Dance
Filippo Mantovani, Fabio Banchelli, Pablo Vizcaino +36
This paper presents EPAC, a RISC-V-based accelerator chip developed within the European Processor Initiative (EPI) as part of a multi-year, multi-partner effort to build a European…
CBP: Coordinated management of cache partitioning, bandwidth partitioning and prefetch throttling
Nadja Ramhöj Holtryd, Madhavan Manivannan, Per Stenström +1
Reducing the average memory access time is crucial for improving the performance of applications running on multi-core architectures. With workload consolidation this becomes incre…
Coordinated Management of Processor Configuration and Cache Partitioning to Optimize Energy under QoS Constraints
Mehrzad Nejat, Madhavan Manivannan, Miquel Pericas +1
An effective way to improve energy efficiency is to throttle hardware resources to meet a certain performance target, specified as a QoS constraint, associated with all application…
Coordinated Management of DVFS and Cache Partitioning under QoS Constraints to Save Energy in Multi-Core Systems
Mehrzad Nejat, Madhavan Manivannan, Miquel Pericas +1
Reducing the energy expended to carry out a computational task is important. In this work, we explore the prospects of meeting Quality-of-Service requirements of tasks on a multi-c…