4 citations · 12 across the 4 of their papers we have counts for
4 papers
Representing Gate-Level SET Faults by Multiple SEU Faults at RTL
Ahmet Cagri Bagbaba, Maksim Jenihhin, Raimund Ubar +1
The advanced complex electronic systems increasingly demand safer and more secure hardware parts. Correspondingly, fault injection became a major verification milestone for both sa…
New categories of Safe Faults in a processor-based Embedded System
C. C. Gursoy, M. Jenihhin, A. S. Oyeniran +4
The identification of safe faults (i.e., faults which are guaranteed not to produce any failure) in an electronic system is a crucial step when analyzing its dependability and its…
High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors
Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin +2
Recent safety standards set stringent requirements for the target fault coverage in embedded microprocessors, with the objective to guarantee robustness and functional safety of th…
Mixed-level identification of fault redundancy in microprocessors
Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin +2
A new high-level implementation independent functional fault model for control faults in microprocessors is introduced. The fault model is based on the instruction set, and is spec…