3 citations · 3 across the 7 of their papers we have counts for
13 papers
Encoder-Decoder Networks for Analyzing Thermal and Power Delivery Networks
Vidya A. Chhabria, Vipul Ahuja, Ashwath Prabhu +3
Power delivery network (PDN) analysis and thermal analysis are computationally expensive tasks that are essential for successful IC design. Algorithmically, both these analyses hav…
OpeNPDN: A Neural-network-based Framework for Power Delivery Network Synthesis
Vidya A. Chhabria, Sachin S. Sapatnekar
Power delivery network (PDN) design is a nontrivial, time-intensive, and iterative task. Correct PDN design must account for considerations related to power bumps, currents, blocka…
Exploring the Feasibility of Using 3D XPoint as an In-Memory Computing Accelerator
Masoud Zabihi, Salonik Resch, Husrev Cılasun +5
This paper describes how 3D XPoint memory arrays can be used as in-memory computing accelerators. We first show that thresholded matrix-vector multiplication (TMVM), the fundamenta…
A New, Computationally Efficient "Blech Criterion" for Immortality in General Interconnects
Mohammad Abdullah Al Shohel, Vidya A. Chhabria, Sachin S. Sapatnekar
Traditional methodologies for analyzing electromigration (EM) in VLSI circuits first filter immortal wires using Blech's criterion, and then perform detailed EM analysis on the rem…
GNNIE: GNN Inference Engine with Load-balancing and Graph-Specific Caching
Sudipta Mondal, Susmita Dey Manasi, Kishor Kunal +2
Graph neural networks (GNN) analysis engines are vital for real-world problems that use large graph models. Challenges for a GNN hardware platform include the ability to (a) host a…
MAVIREC: ML-Aided Vectored IR-DropEstimation and Classification
Vidya A. Chhabria, Yanqing Zhang, Haoxing Ren +3
Vectored IR drop analysis is a critical step in chip signoff that checks the power integrity of an on-chip power delivery network. Due to the prohibitive runtimes of dynamic IR dro…