From the 2 of 5 linked papers with an AI index.
5 papers
CSCO: A Backside-PDN-Aware Clock-Signal Co-Optimization Framework for Improved PPA
Zixiao Wang, Leilei Jin, Zhen Zhuang +2
The paper presents CSCO, a data‑driven framework that jointly allocates limited backside power‑delivery network resources between clock and signal nets to improve power, performanc…
CLIP-3D: Closed-Loop Evaluation of Performance and Physical Constraints for 3D ICs
Shuo Ren, Libo Shen, Yaohui Han +6
The paper introduces CLIP-3D, a methodology that integrates power, cache, and thermal models with architectural simulation to evaluate the performance and physical constraints of 3…
AgenticPD: A Stage-Aware Agentic Framework for Physical Design QoR Optimization
Shuo Ren, Zijin Cheng, Yaohui Han +7
Physical design quality-of-results~(QoR) optimization is hard and expensive. Choices made at one stage can help or hurt later stages. Each evaluation requires a costly EDA run thro…
R2G: A Multi-View Circuit Graph Benchmark Suite from RTL to GDSII
Zewei Zhou, Jiajun Zou, Jiajia Zhang +8
Graph neural networks (GNNs) are increasingly applied to physical design tasks such as congestion prediction and wirelength estimation, yet progress is hindered by inconsistent cir…
A Crosstalk-Aware Timing Prediction Method in Routing
Leilei Jin, Jiajie Xu, Wenjie Fu +2
With shrinking interconnect spacing in advanced technology nodes, existing timing predictions become less precise due to the challenging quantification of crosstalk-induced delay.…