From the 1 of 5 linked papers with an AI index.
5 papers
HORCRUX: A Complete PQC RISC-V eXtension Architecture
Alessandra Dolmeta, Valeria Piscopo, Michael Hutter +2
The paper introduces HORCRUX, a compact RISC‑V instruction‑set extension that accelerates all NIST‑approved post‑quantum cryptography algorithms on embedded hardware, achieving lar…
TinyCL: An Efficient Hardware Architecture for Continual Learning on Autonomous Systems
Eugenio Ressa, Alberto Marchisio, Maurizio Martina +2
The Continuous Learning (CL) paradigm consists of continuously evolving the parameters of the Deep Neural Network (DNN) model to progressively learn to perform new tasks without re…
Just TestIt! An SBST Approach To Automate System-Integration Testing
Tommaso Terzano, Luigi Giuffrida, Juan Sapriza +5
This paper introduces TestIt, an open-source Python package designed to automate full-system integration testing using a Software-Based Self-Test (SBST) approach. By dynamically ge…
ARCANE: Adaptive RISC-V Cache Architecture for Near-memory Extensions
Vincenzo Petrolo, Flavia Guella, Michele Caon +3
Modern data-driven applications expose limitations of von Neumann architectures - extensive data movement, low throughput, and poor energy efficiency. Accelerators improve performa…
Scalable and RISC-V Programmable Near-Memory Computing Architectures for Edge Nodes
Michele Caon, Clément Choné, Pasquale Davide Schiavone +4
The widespread adoption of data-centric algorithms, particularly Artificial Intelligence (AI) and Machine Learning (ML), has exposed the limitations of centralized processing infra…