2 papers
cs.AR2025
NeCTAr: A Heterogeneous RISC-V SoC for Language Model Inference in Intel 16
Viansa Schmulbach, Jason Kim, Ethan Gao +4
This paper introduces NeCTAr (Near-Cache Transformer Accelerator), a 16nm heterogeneous multicore RISC-V SoC for sparse and dense machine learning kernels with both near-core and n…
cs.AR2024
Instruction Scheduling in the Saturn Vector Unit
Jerry Zhao, Daniel Grubb, Miles Rusch +4
While the challenges and solutions for efficient execution of scalable vector ISAs on long-vector-length microarchitectures have been well established, not all of these solutions a…