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Anantha Chandrakasan

3 papers hereh-index 7259 citations29 works total

Matching runs newest-first, so older work may not be attached to this profile yet.

author position
  • middle author2
  • last author1

Across the 3 of 3 papers where every author was matched, so the position is known.

fields
  • cs.CL1
  • cs.LG1
  • cs.SE1

identity via Semantic Scholar / OpenAlex

works on
analog circuit design 1large language models 1LLM agents 1SAR ADC 1simulation validation 1template-constrained generation 1

From the 1 of 3 linked papers with an AI index.

collaborators

3 papers

cs.SE2026

Towards Reliable AI-Assisted Analog Design: Template-Constrained LLM Agents for SAR ADC Generation

Dimple Vijay Kochar, Hae-Seung Lee, Anantha P. Chandrakasan

The paper introduces ATLAS, a multi-step LLM agent framework that uses template-constrained generation and expert knowledge to automatically design SAR ADC circuits that successful…

cs.CL2026

Adaptive Block-Scaled Data Types

Jack Cook, Hyemin S. Lee, Kathryn Le +4

NVFP4 has grown increasingly popular as a 4-bit format for quantizing large language models due to its hardware support and its ability to retain useful information with relatively…

cs.LG2025

LEDRO: LLM-Enhanced Design Space Reduction and Optimization for Analog Circuits

Dimple Vijay Kochar, Hanrui Wang, Anantha Chandrakasan +1

Traditional approaches for designing analog circuits are time-consuming and require significant human expertise. Existing automation efforts using methods like Bayesian Optimizatio…

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Not affiliated with arXiv. Researcher data from Semantic Scholar (ODC-BY) and OpenAlex.