2 papers
cs.CE2025
Design and Verification of a Synchronus First In First Out (FIFO)
Yatheeswar Penta, Riadul Islam
This project focuses on designing and verifying a synchronous FIFO First In First Out (FIFO) memory, a critical component in digital systems for temporary data storage and seamless…
cs.AR2025
Integrated AHB to APB Bridge Using Raspberry Pi and Artix-7 FPGA
Gopi Chand Ananthu, Riadul Islam
This project focuses on the design and implementation of an AHB to APB Bridge for efficient communication in System-on-Chip (SoC) architectures. The Advanced High-performance Bus (…