1 citations · 4 across the 9 of their papers we have counts for
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Dynamic Tsetlin Machine Accelerators for On-Chip Training at the Edge using FPGAs
Gang Mao, Tousif Rahman, Sidharth Maheshwari +4
The increased demand for data privacy and security in machine learning (ML) applications has put impetus on effective edge training on Internet-of-Things (IoT) nodes. Edge training…
IMPACT:InMemory ComPuting Architecture Based on Y-FlAsh Technology for Coalesced Tsetlin Machine Inference
Omar Ghazal, Wei Wang, Shahar Kvatinsky +3
The increasing demand for processing large volumes of data for machine learning models has pushed data bandwidth requirements beyond the capability of traditional von Neumann archi…
In-Memory Learning Automata Architecture using Y-Flash Cell
Omar Ghazal, Tian Lan, Shalman Ojukwu +3
The modern implementation of machine learning architectures faces significant challenges due to frequent data transfer between memory and processing units. In-memory computing, pri…
MATADOR: Automated System-on-Chip Tsetlin Machine Design Generation for Edge Applications
Tousif Rahman, Gang Mao, Sidharth Maheshwari +2
System-on-Chip Field-Programmable Gate Arrays (SoC-FPGAs) offer significant throughput gains for machine learning (ML) edge inference applications via the design of co-processor ac…
IMBUE: In-Memory Boolean-to-CUrrent Inference ArchitecturE for Tsetlin Machines
Omar Ghazal, Simranjeet Singh, Tousif Rahman +8
In-memory computing for Machine Learning (ML) applications remedies the von Neumann bottlenecks by organizing computation to exploit parallelism and locality. Non-volatile memory d…