3 papers
cs.CR2025
Low latency FPGA implementation of twisted Edward curve cryptography hardware accelerator over prime field
Md Rownak Hossain, Md Sazedur Rahman, Kh Shahriya Zaman +5
The performance of any elliptic curve cryptography hardware accelerator significantly relies on the efficiency of the underlying point multiplication (PM) architecture. This articl…
cs.AR2025
FPGA-Optimized Hardware Accelerator for Fast Fourier Transform and Singular Value Decomposition in AI
Hong Ding, Chia Chao Kang, SuYang Xi +3
This research introduces an FPGA-based hardware accelerator to optimize the Singular Value Decomposition (SVD) and Fast Fourier transform (FFT) operations in AI models. The propose…
cs.RO2024
Enhancing Autonomous Driving Safety through World Model-Based Predictive Navigation and Adaptive Learning Algorithms for 5G Wireless Applications
Hong Ding, Ziming Wang, Yi Ding +3
Addressing the challenge of ensuring safety in ever-changing and unpredictable environments, particularly in the swiftly advancing realm of autonomous driving in today's 5G wireles…