works on

From the 1 of 10 linked papers with an AI index.

most citedHermes: Accelerating Long-Latency Load Requests via Perceptron-Based Off-Chip Load Prediction

1 citations · 1 across the 2 of their papers we have counts for

collaborators

10 papers

cs.AR2026

Valinor: Architectural Support for Fast, Energy-Efficient and Programmable Physical Memory Allocation

Konstantinos Kanellopoulos, Spiros Galanopoulos, Konstantinos Sgouras +7

Valinor is a hardware‑OS cooperative substrate that provides a programmable allocation engine to accelerate physical memory allocation, achieving hardware‑level speed while retaini…

cs.AR2026

Revelator: Rapid Data Fetching via System-Software-Guided Hash-based Speculative Address Translation

Konstantinos Kanellopoulos, Konstantinos Sgouras, Harsh Songara +7

Address translation is a major performance bottleneck in modern computing systems. Predicting the physical address (PA) of requested data before address translation completes can h…

cs.AR20261 cited

Hermes: Accelerating Long-Latency Load Requests via Perceptron-Based Off-Chip Load Prediction

Rahul Bera, Konstantinos Kanellopoulos, Shankar Balachandran +4

Long-latency load requests continue to limit the performance of high-performance processors. To increase the latency tolerance of a processor, architects have primarily relied on t…

cs.AR2026

Harmonia: Enhancing Data Placement and Migration in Hybrid Storage Systems via Multi-Agent Reinforcement Learning

Rakesh Nadig, Vamanan Arulchelvan, Rahul Bera +7

Modern high-performance computing (HPC) environments rely on hybrid storage systems (HSS) that combine multiple storage devices with diverse latency, bandwidth, endurance, and capa…

cs.AR2026

Machine Learning-Driven Intelligent Memory System Design: From On-Chip Caches to Storage

Rahul Bera, Rakesh Nadig, Onur Mutlu

Despite the data-rich environment in which memory systems of modern computing platforms operate, many state-of-the-art architectural policies employed in the memory system rely on…

cs.AR2026

Mitigating the Memory Bottleneck with Machine Learning-Driven and Data-Aware Microarchitectural Techniques

Rahul Bera

Modern applications process massive data volumes that overwhelm the storage and retrieval capabilities of memory systems, making memory the primary performance and energy-efficienc…