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20132024
most citedAll-Digital Self-interference Cancellation Technique for Full-duplex Systems

446 citations · 958 across the 37 of their papers we have counts for

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Showing cs.ARShow all

7 papers · 1 filter

cs.AR2024

Towards Efficient IMC Accelerator Design Through Joint Hardware-Workload Co-optimization

Olga Krestinskaya, Mohammed E. Fouda, Ahmed Eltawil +1

Designing generalized in-memory computing (IMC) hardware that efficiently supports a variety of workloads requires extensive design space exploration, which is infeasible to perfor…

cs.AR2023

Thermal Heating in ReRAM Crossbar Arrays: Challenges and Solutions

Kamilya Smagulova, Mohammed E. Fouda, Ahmed Eltawil

The higher speed, scalability and parallelism offered by ReRAM crossbar arrays foster development of ReRAM-based next generation AI accelerators. At the same time, sensitivity of R…

cs.AR2022★ 1 cited

DNA Pattern Matching Acceleration with Analog Resistive CAM

Jinane Bazzi, Jana Sweidan, Mohammed E. Fouda +2

DNA pattern matching is essential for many widely used bioinformatics applications. Disease diagnosis is one of these applications, since analyzing changes in DNA sequences can inc…

cs.AR2022★ 5 cited

Efficient Analog CAM Design

Jinane Bazzi, Jana Sweidan, Mohammed E. Fouda +2

Content Addressable Memories (CAMs) are considered a key-enabler for in-memory computing (IMC). IMC shows order of magnitude improvement in energy efficiency and throughput compare…

cs.AR2021

In-memory Multi-valued Associative Processor

Mira Hout, Mohammed E. Fouda, Rouwaida Kanj +1

In-memory associative processor architectures are offered as a great candidate to overcome memory-wall bottleneck and to enable vector/parallel arithmetic operations. In this paper…

cs.AR2021

Resistive Neural Hardware Accelerators

Kamilya Smagulova, Mohammed E. Fouda, Fadi Kurdahi +2

Deep Neural Networks (DNNs), as a subset of Machine Learning (ML) techniques, entail that real-world data can be learned and that decisions can be made in real-time. However, their…

cs.AR2014

State Dependent Statistical Timing Model for Voltage Scaled Circuits

Aras Pirbadian, Muhammad S. Khairy, Ahmed M. Eltawil +1

This paper presents a novel statistical state-dependent timing model for voltage over scaled (VoS) logic circuits that accurately and rapidly finds the timing distribution of outpu…