2 papers
cs.AR2025
CRYPTONITE: Scalable Accelerator Design for Cryptographic Primitives and Algorithms
Karthikeya Sharma Maheswaran, Camille Bossut, Andy Wanna +2
Cryptographic primitives, consisting of repetitive operations with different inputs, are typically implemented using straight-line C code due to traditional execution on CPUs. Comp…
cs.AR2025
RealProbe: An Automated and Lightweight Performance Profiler for In-FPGA Execution of High-Level Synthesis Designs
Jiho Kim, Cong Hao
High-level synthesis (HLS) accelerates FPGA design by rapidly generating diverse implementations using optimization directives. However, even with cycle-accurate C/RTL co-simulatio…