4 papers
System-level optimization of Network-on-Chips for heterogeneous 3D System-on-Chips
Jan Moritz Joseph, Dominik Ermel, Lennart Bamberg +2
For a system-level design of Networks-on-Chip for 3D heterogeneous System-on-Chip (SoC), the locations of components, routers and vertical links are determined from an application…
NoCs in Heterogeneous 3D SoCs: Co-Design of Routing Strategies and Microarchitectures
Jan Moritz Joseph, Lennart Bamberg, Dominik Ermel +4
Heterogeneous 3D System-on-Chips (3D SoCs) are the most promising design paradigm to combine sensing and computing within a single chip. A special characteristic of communication n…
Area Optimization with Non-linear Models in Core Mapping for System-on-Chips
Jan Moritz Joseph, Dominik Ermel, Tobias Drewes +3
Linear models are regularly used for mapping cores to tiles in a chip. System-on-Chip (SoC) design requires integration of functional units with varying sizes, but conventional mod…
Parity Polytopes and Binarization
Dominik Ermel, Matthias Walter
We consider generalizations of parity polytopes whose variables, in addition to a parity constraint, satisfy certain ordering constraints. More precisely, the variable domain is pa…