20 citations · 47 across the 7 of their papers we have counts for
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cs.AR2024
Cocco: Hardware-Mapping Co-Exploration towards Memory Capacity-Communication Optimization
Zhanhong Tan, Zijian Zhu, Kaisheng Ma
Memory is a critical design consideration in current data-intensive DNN accelerators, as it profoundly determines energy consumption, bandwidth requirements, and area costs. As DNN…
cs.AR2023★ 2 cited
Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators
Jingwei Cai, Zuotong Wu, Sen Peng +5
Chiplet technology enables the integration of an increasing number of transistors on a single accelerator with higher yield in the post-Moore era, addressing the immense computatio…
cs.AR2022★ 20 cited
YOLoC: DeploY Large-Scale Neural Network by ROM-based Computing-in-Memory using ResiduaL Branch on a Chip
Yiming Chen, Guodong Yin, Zhanhong Tan +6
Computing-in-memory (CiM) is a promising technique to achieve high energy efficiency in data-intensive matrix-vector multiplication (MVM) by relieving the memory bottleneck. Unfort…