63 citations · 113 across the 6 of their papers we have counts for
6 papers
SpikeSim: An end-to-end Compute-in-Memory Hardware Evaluation Tool for Benchmarking Spiking Neural Networks
Abhishek Moitra, Abhiroop Bhattacharjee, Runcong Kuang +3
SNNs are an active research domain towards energy efficient machine intelligence. Compared to conventional ANNs, SNNs use temporal spike data and bio-plausible neuronal activation…
COIN: Communication-Aware In-Memory Acceleration for Graph Convolutional Networks
Sumit K. Mandal, Gokul Krishnan, A. Alper Goksoy +3
Graph convolutional networks (GCNs) have shown remarkable learning capabilities when processing graph-structured data found inherently in many application areas. GCNs distribute th…
SIAM: Chiplet-based Scalable In-Memory Acceleration with Mesh for Deep Neural Networks
Gokul Krishnan, Sumit K. Mandal, Manvitha Pannala +4
In-memory computing (IMC) on a monolithic chip for deep learning faces dramatic challenges on area, yield, and on-chip interconnection cost due to the ever-increasing model sizes.…
Impact of On-Chip Interconnect on In-Memory Acceleration of Deep Neural Networks
Gokul Krishnan, Sumit K. Mandal, Chaitali Chakrabarti +3
With the widespread use of Deep Neural Networks (DNNs), machine learning algorithms have evolved in two diverse directions -- one with ever-increasing connection density for better…
Structural Pruning in Deep Neural Networks: A Small-World Approach
Gokul Krishnan, Xiaocong Du, Yu Cao
Deep Neural Networks (DNNs) are usually over-parameterized, causing excessive memory and interconnection cost on the hardware platform. Existing pruning approaches remove secondary…
Towards Efficient Neural Networks On-a-chip: Joint Hardware-Algorithm Approaches
Xiaocong Du, Gokul Krishnan, Abinash Mohanty +3
Machine learning algorithms have made significant advances in many applications. However, their hardware implementation on the state-of-the-art platforms still faces several challe…