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20182026
most citedFLiMS: a Fast Lightweight 2-way Merger for Sorting

15 citations · 49 across the 11 of their papers we have counts for

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cs.AR2026

LUTstructions: Fast-Reconfigurable FPGA-Based Instructions

Philippos Papaphilippou

General-purpose processors feature a limited number of instructions based on an instruction set. They can be numerous, such as with vector extensions that include hundreds or thous…

cs.AR2024

Enthuse: Efficient Adaptable High-throughput Streaming Aggregation Engines

Philippos Papaphilippou, Wayne Luk

Aggregation queries are a series of computationally-demanding analytics operations on counted, grouped or time series data. They include tasks such as summation or finding the medi…

cs.AR2023★ 12 cited

Efficient deadlock avoidance for 2D mesh NoCs that use OQ or VOQ routers

Philippos Papaphilippou, Thiem Van Chu

Network-on-chips (NoCs) are currently a widely used approach for achieving scalability of multi-cores to many-cores, as well as for interconnecting other vital system-on-chip (SoC)…

cs.AR2022

FPGA-extended General Purpose Computer Architecture

Philippos Papaphilippou, Myrtle Shah

This paper introduces a computer architecture, where part of the instruction set architecture (ISA) is implemented on small highly-integrated field-programmable gate arrays (FPGAs)…

cs.AR2021★ 15 cited

FLiMS: a Fast Lightweight 2-way Merger for Sorting

Philippos Papaphilippou, Wayne Luk, Chris Brooks

In this paper, we present FLiMS, a highly-efficient and simple parallel algorithm for merging two sorted lists residing in banked and/or wide memory. On FPGAs, its implementation u…

cs.AR2021★ 3 cited

Extending the RISC-V ISA for exploring advanced reconfigurable SIMD instructions

Philippos Papaphilippou, Paul H. J. Kelly, Wayne Luk

This paper presents a novel, non-standard set of vector instruction types for exploring custom SIMD instructions in a softcore. The new types allow simultaneous access to a relativ…