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cs.AR2026
Improving Indirect Branch Prediction in Interpreters via Hardware/Software Co-Design
Linfeng Zheng, Hiroshi Sasaki
Interpreters have a large indirect-branch footprint, requiring large predictor capacity for accurate prediction. We propose a hardware/software co-design in which a hardware lookah…
cs.AR2026
Exploiting Decompression Latency for Covert Channels in Inter-Line-Compressed LLCs
David K. Oh, Hiroshi Sasaki
The recently proposed XOR cache is an inter-line-compressed last-level cache (LLC) that leverages the data-inclusion relationship between the private caches and the LLC, compressin…