9 citations · 38 across the 15 of their papers we have counts for
15 papers
NeuroAI Temporal Neural Networks (NeuTNNs): Microarchitecture and Design Framework for Specialized Neuromorphic Processing Units
Shanmuga Venkatachalam, Prabhu Vellaisamy, Harideep Nair +5
Leading experts from both communities have suggested the need to (re)connect research in neuroscience and artificial intelligence (AI) to accelerate the development of next-generat…
Exploration of Unary Arithmetic-Based Matrix Multiply Units for Low Precision DL Accelerators
Prabhu Vellaisamy, Harideep Nair, Di Wu +2
General matrix multiplication (GEMM) is a fundamental operation in deep learning (DL). With DL moving increasingly toward low precision, recent works have proposed novel unary GEMM…
Tempus Core: Area-Power Efficient Temporal-Unary Convolution Core for Low-Precision Edge DLAs
Prabhu Vellaisamy, Harideep Nair, Thomas Kang +6
The increasing complexity of deep neural networks (DNNs) poses significant challenges for edge inference deployment due to resource and power constraints of edge devices. Recent wo…
TNNGen: Automated Design of Neuromorphic Sensory Processing Units for Time-Series Clustering
Prabhu Vellaisamy, Harideep Nair, Vamsikrishna Ratnakaram +2
Temporal Neural Networks (TNNs), a special class of spiking neural networks, draw inspiration from the neocortex in utilizing spike-timings for information processing. Recent works…
tuGEMM: Area-Power-Efficient Temporal Unary GEMM Architecture for Low-Precision Edge AI
Harideep Nair, Prabhu Vellaisamy, Albert Chen +4
General matrix multiplication (GEMM) is a ubiquitous computing kernel/algorithm for data processing in diverse applications, including artificial intelligence (AI) and deep learnin…
tubGEMM: Energy-Efficient and Sparsity-Effective Temporal-Unary-Binary Based Matrix Multiply Unit
Prabhu Vellaisamy, Harideep Nair, Joseph Finn +7
General Matrix Multiplication (GEMM) is a ubiquitous compute kernel in deep learning (DL). To support energy-efficient edge-native processing, new GEMM hardware units have been pro…
NeRTCAM: CAM-Based CMOS Implementation of Reference Frames for Neuromorphic Processors
Harideep Nair, William Leyman, Agastya Sampath +2
Neuromorphic architectures mimicking biological neural networks have been proposed as a much more efficient alternative to conventional von Neumann architectures for the exploding…
Realtime Person Identification via Gait Analysis
Shanmuga Venkatachalam, Harideep Nair, Prabhu Vellaisamy +3
Each person has a unique gait, i.e., walking style, that can be used as a biometric for personal identification. Recent works have demonstrated effective gait recognition using dee…
Commercial Evaluation of Zero-Skipping MAC Design for Bit Sparsity Exploitation in DL Inference
Harideep Nair, Prabhu Vellaisamy, Tsung-Han Lin +3
General Matrix Multiply (GEMM) units, consisting of multiply-accumulate (MAC) arrays, perform bulk of the computation in deep learning (DL). Recent work has proposed a novel MAC de…
TNN7: A Custom Macro Suite for Implementing Highly Optimized Designs of Neuromorphic TNNs
Harideep Nair, Prabhu Vellaisamy, Santha Bhasuthkar +1
Temporal Neural Networks (TNNs), inspired from the mammalian neocortex, exhibit energy-efficient online sensory processing capabilities. Recent works have proposed a microarchitect…
A Microarchitecture Implementation Framework for Online Learning with Temporal Neural Networks
Harideep Nair, John Paul Shen, James E. Smith
Temporal Neural Networks (TNNs) are spiking neural networks that use time as a resource to represent and process information, similar to the mammalian neocortex. In contrast to com…
Unsupervised Clustering of Time Series Signals using Neuromorphic Energy-Efficient Temporal Neural Networks
Shreyas Chaudhari, Harideep Nair, José M. F. Moura +1
Unsupervised time series clustering is a challenging problem with diverse industrial applications such as anomaly detection, bio-wearables, etc. These applications typically involv…
A Custom 7nm CMOS Standard Cell Library for Implementing TNN-based Neuromorphic Processors
Harideep Nair, Prabhu Vellaisamy, Santha Bhasuthkar +1
A set of highly-optimized custom macro extensions is developed for a 7nm CMOS cell library for implementing Temporal Neural Networks (TNNs) that can mimic brain-like sensory proces…
Direct CMOS Implementation of Neuromorphic Temporal Neural Networks for Sensory Processing
Harideep Nair, John Paul Shen, James E. Smith
Temporal Neural Networks (TNNs) use time as a resource to represent and process information, mimicking the behavior of the mammalian neocortex. This work focuses on implementing TN…
Hardware Aware Neural Network Architectures using FbNet
Sai Vineeth Kalluru Srinivas, Harideep Nair, Vinay Vidyasagar
We implement a differentiable Neural Architecture Search (NAS) method inspired by FBNet for discovering neural networks that are heavily optimized for a particular target device. T…