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cs.SE2022
Geometric Theory for Program Testing
Bernhard Moller, Tony Hoare, Zhe Hou +1
Formal methods for verification of programs are extended to testing of programs. Their combination is intended to lead to benefits in reliable program development, testing, and evo…
cs.CL2022
An Executable Formal Model of the VHDL in Isabelle/HOL
Wilayat Khan, Zhe Hou, David Sanan +3
In the hardware design process, hardware components are usually described in a hardware description language. Most of the hardware description languages, such as Verilog and VHDL,…