18 citations · 40 across the 16 of their papers we have counts for
7 papers · 1 filter
Enhancing Performance and Scalability of Large-Scale Recommendation Systems with Jagged Flash Attention
Rengan Xu, Junjie Yang, Yifan Xu +17
The integration of hardware accelerators has significantly advanced the capabilities of modern recommendation systems, enabling the exploration of complex ranking paradigms previou…
Can Dense Connectivity Benefit Outlier Detection? An Odyssey with NAS
Hao Fu, Tunhou Zhang, Hai Li +1
Recent advances in Out-of-Distribution (OOD) Detection is the driving force behind safe and reliable deployment of Convolutional Neural Networks (CNNs) in real world applications.…
Farthest Greedy Path Sampling for Two-shot Recommender Search
Yufan Cao, Tunhou Zhang, Wei Wen +3
Weight-sharing Neural Architecture Search (WS-NAS) provides an efficient mechanism for developing end-to-end deep recommender models. However, in complex search spaces, distinguish…
Towards Collaborative Intelligence: Routability Estimation based on Decentralized Private Data
Jingyu Pan, Chen-Chia Chang, Zhiyao Xie +5
Applying machine learning (ML) in design flow is a popular trend in EDA with various applications from design quality predictions to optimizations. Despite its promise, which has b…
Automatic Routability Predictor Development Using Neural Architecture Search
Chen-Chia Chang, Jingyu Pan, Tunhou Zhang +8
The rise of machine learning technology inspires a boom of its applications in electronic design automation (EDA) and helps improve the degree of automation in chip designs. Howeve…
AutoShrink: A Topology-aware NAS for Discovering Efficient Neural Architecture
Tunhou Zhang, Hsin-Pai Cheng, Zhenwen Li +4
Resource is an important constraint when deploying Deep Neural Networks (DNNs) on mobile and edge devices. Existing works commonly adopt the cell-based search approach, which limit…
SwiftNet: Using Graph Propagation as Meta-knowledge to Search Highly Representative Neural Architectures
Hsin-Pai Cheng, Tunhou Zhang, Yukun Yang +5
Designing neural architectures for edge devices is subject to constraints of accuracy, inference latency, and computational cost. Traditionally, researchers manually craft deep neu…