4 papers
Calipers: A Criticality-aware Framework for Modeling Processor Performance
Hossein Golestani, Rathijit Sen, Vinson Young +1
Computer architecture design space is vast and complex. Tools are needed to explore new ideas and gain insights quickly, with low efforts and at a desired accuracy. We propose Cali…
TicToc: Enabling Bandwidth-Efficient DRAM Caching for both Hits and Misses in Hybrid Memory Systems
Vinson Young, Zeshan Chishti, Moinuddin K. Qureshi
This paper investigates bandwidth-efficient DRAM caching for hybrid DRAM + 3D-XPoint memories. 3D-XPoint is becoming a viable alternative to DRAM as it enables high-capacity and no…
To Update or Not To Update?: Bandwidth-Efficient Intelligent Replacement Policies for DRAM Caches
Vinson Young, Moinuddin K. Qureshi
This paper investigates intelligent replacement policies for improving the hit-rate of gigascale DRAM caches. Cache replacement policies are commonly used to improve the hit-rate o…
CRAM: Efficient Hardware-Based Memory Compression for Bandwidth Enhancement
Vinson Young, Sanjay Kariyappa, Moinuddin K. Qureshi
This paper investigates hardware-based memory compression designs to increase the memory bandwidth. When lines are compressible, the hardware can store multiple lines in a single m…