activity
20182026
most citedSAT-hard Cyclic Logic Obfuscation for Protecting the IP in the Manufacturing Supply Chain

30 citations · 170 across the 53 of their papers we have counts for

collaborators
Showing cs.CRShow all

25 papers · 1 filter

cs.CR2026

Beyond End-to-End Success: Diagnosing Failures in Long-Horizon Security LLM Agents

Wei Shao, Chongzhou Fang, Zuxiong Tan +4

Long-horizon security LLM agents must carry information and decisions across many dependent interactions, where later actions often depend on services, state, or access discovered…

cs.CR2026

Kumo: A Security-Focused Serverless Cloud Simulator

Wei Shao, Khaled Khasawneh, Setareh Rafatirad +2

Serverless computing abstracts infrastructure management but also obscures system-level behaviors that can introduce security risks. Prior work has shown that serverless platforms…

cs.CR2026

Is Mamba Reliable for Medical Imaging?

Banafsheh Saber Latibari, Najmeh Nazari, Daniel Brignac +3

State-space models like Mamba offer linear-time sequence processing and low memory, making them attractive for medical imaging. However, their robustness under realistic software a…

cs.CR2026

Bit of a Close Talker: A Practical Guide to Serverless Cloud Co-Location Attacks

Wei Shao, Najmeh Nazari, Behnam Omidi +4

Serverless computing has revolutionized cloud computing by offering users an efficient, cost-effective way to develop and deploy applications without managing infrastructure detail…

cs.CR2025

FaRAccel: FPGA-Accelerated Defense Architecture for Efficient Bit-Flip Attack Resilience in Transformer Models

Najmeh Nazari, Banafsheh Saber Latibari, Elahe Hosseini +8

Forget and Rewire (FaR) methodology has demonstrated strong resilience against Bit-Flip Attacks (BFAs) on Transformer-based models by obfuscating critical parameters through dynami…

cs.CR2025

Hammering the Diagnosis: Rowhammer-Induced Stealthy Trojan Attacks on ViT-Based Medical Imaging

Banafsheh Saber Latibari, Najmeh Nazari, Hossein Sayadi +2

Vision Transformers (ViTs) have emerged as powerful architectures in medical image analysis, excelling in tasks such as disease detection, segmentation, and classification. However…

cs.CR2025

Know Me by My Pulse: Toward Practical Continuous Authentication on Wearable Devices via Wrist-Worn PPG

Wei Shao, Zequan Liang, Ruoyu Zhang +6

Biometric authentication using physiological signals offers a promising path toward secure and user-friendly access control in wearable devices. While electrocardiogram (ECG) signa…

cs.CR2025

Transformers for Secure Hardware Systems: Applications, Challenges, and Outlook

Banafsheh Saber Latibari, Najmeh Nazari, Avesta Sasan +4

The rise of hardware-level security threats, such as side-channel attacks, hardware Trojans, and firmware vulnerabilities, demands advanced detection mechanisms that are more intel…

cs.CR2024

Automated Hardware Logic Obfuscation Framework Using GPT

Banafsheh Saber Latibari, Sujan Ghimire, Muhtasim Alam Chowdhury +5

Obfuscation stands as a promising solution for safeguarding hardware intellectual property (IP) against a spectrum of threats including reverse engineering, IP piracy, and tamperin…

cs.CR2024★ 2 cited

Generative AI-Based Effective Malware Detection for Embedded Computing Systems

Sreenitha Kasarapu, Sanket Shukla, Rakibul Hassan +3

One of the pivotal security threats for the embedded computing systems is malicious software a.k.a malware. With efficiency and efficacy, Machine Learning (ML) has been widely adop…

cs.CR2023★ 6 cited

Gotcha! I Know What You are Doing on the FPGA Cloud: Fingerprinting Co-Located Cloud FPGA Accelerators via Measuring Communication Links

Chongzhou Fang, Ning Miao, Han Wang +5

In recent decades, due to the emerging requirements of computation acceleration, cloud FPGAs have become popular in public clouds. Major cloud service providers, e.g. AWS and Micro…

cs.CR2023

Side Channel-Assisted Inference Leakage from Machine Learning-based ECG Classification

Jialin Liu, Ning Miao, Chongzhou Fang +2

The Electrocardiogram (ECG) measures the electrical cardiac activity generated by the heart to detect abnormal heartbeat and heart attack. However, the irregular occurrence of the…

cs.CR2022★ 9 cited

A Neural Network-based SAT-Resilient Obfuscation Towards Enhanced Logic Locking

Rakibul Hassan, Gaurav Kolhe, Setareh Rafatirad +2

Logic obfuscation is introduced as a pivotal defense against multiple hardware threats on Integrated Circuits (ICs), including reverse engineering (RE) and intellectual property (I…

cs.CR2020★ 12 cited

NNgSAT: Neural Network guided SAT Attack on Logic Locked Complex Structures

Kimia Zamiri Azar, Hadi Mardani Kamali, Houman Homayoun +1

The globalization of the IC supply chain has raised many security threats, especially when untrusted parties are involved. This has created a demand for a dependable logic obfuscat…

cs.CR2020★ 8 cited

InterLock: An Intercorrelated Logic and Routing Locking

Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun +1

In this paper, we propose a canonical prune-and-SAT (CP&SAT) attack for breaking state-of-the-art routing-based obfuscation techniques. In the CP&SAT attack, we first encode the ke…

cs.CR2020

SCRAMBLE: The State, Connectivity and Routing Augmentation Model for Building Logic Encryption

Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun +1

In this paper, we introduce SCRAMBLE, as a novel logic locking solution for sequential circuits while the access to the scan chain is restricted. The SCRAMBLE could be used to lock…

cs.CR2020

On Designing Secure and Robust Scan Chain for Protecting Obfuscated Logic

Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun +1

In this paper, we assess the security and testability of the state-of-the-art design-for-security (DFS) architectures in the presence of scan-chain locking/obfuscation, a group of…

cs.CR2020

DFSSD: Deep Faults and Shallow State Duality, A Provably Strong Obfuscation Solution for Circuits with Restricted Access to Scan Chain

Shervin Roshanisefat, Hadi Mardani Kamali, Kimia Zamiri Azar +4

In this paper, we introduce DFSSD, a novel logic locking solution for sequential and FSM circuits with a restricted (locked) access to the scan chain. DFSSD combines two techniques…

cs.CR2020★ 30 cited

SAT-hard Cyclic Logic Obfuscation for Protecting the IP in the Manufacturing Supply Chain

Shervin Roshanisefat, Hadi Mardani Kamali, Houman Homayoun +1

State-of-the-art attacks against cyclic logic obfuscation use satisfiability solvers that are equipped with a set of cycle avoidance clauses. These cycle avoidance clauses are gene…

cs.CR2020

LASCA: Learning Assisted Side Channel Delay Analysis for Hardware Trojan Detection

Ashkan Vakil, Farnaz Behnia, Ali Mirzaeian +3

In this paper, we introduce a Learning Assisted Side Channel delay Analysis (LASCA) methodology for Hardware Trojan detection. Our proposed solution, unlike the prior art, does not…

cs.CR2019★ 20 cited

COMA: Communication and Obfuscation Management Architecture

Kimia Zamiri Azar, Farnoud Farahmand, Hadi Mardani Kamali +5

In this paper, we introduce a novel Communication and Obfuscation Management Architecture (COMA) to handle the storage of the obfuscation key and to secure the communication to/fro…

cs.CR2019★ 9 cited

Threats on Logic Locking: A Decade Later

Kimia Zamiri Azar, Hadi Mardani Kamali, Houman Homayoun +1

To reduce the cost of ICs and to meet the market's demand, a considerable portion of manufacturing supply chain, including silicon fabrication, packaging and testing may be pushed…

cs.CR2019★ 4 cited

Estimating the Circuit Deobfuscating Runtime based on Graph Deep Learning

Zhiqian Chen, Gaurav Kolhe, Setareh Rafatirad +4

Circuit obfuscation is a recently proposed defense mechanism to protect digital integrated circuits (ICs) from reverse engineering by using camouflaged gates i.e., logic gates whos…

cs.CR2018

LUT-Lock: A Novel LUT-based Logic Obfuscation for FPGA-Bitstream and ASIC-Hardware Protection

Hadi Mardani Kamali, Kimia Zamiri Azar, Kris Gaj +2

In this work, we propose LUT-Lock, a novel Look-Up-Table-based netlist obfuscation algorithm, for protecting the intellectual property that is mapped to an FPGA bitstream or an ASI…