54 citations · 135 across the 17 of their papers we have counts for
4 papers · 1 filter
HaoCL: Harnessing Large-scale Heterogeneous Processors Made Easy
Yao Chen, Xin Long, Jiong He +5
The pervasive adoption of Deep Learning (DL) and Graph Processing (GP) makes it a de facto requirement to build large-scale clusters of heterogeneous accelerators including GPUs an…
AutoDNNchip: An Automated DNN Chip Predictor and Builder for Both FPGAs and ASICs
Pengfei Xu, Xiaofan Zhang, Cong Hao +7
Recent breakthroughs in Deep Neural Networks (DNNs) have fueled a growing demand for DNN chips. However, designing DNN chips is non-trivial because: (1) mainstream DNNs have millio…
Design Flow of Accelerating Hybrid Extremely Low Bit-width Neural Network in Embedded FPGA
Junsong Wang, Qiuwen Lou, Xiaofan Zhang +3
Neural network accelerators with low latency and low energy consumption are desirable for edge computing. To create such accelerators, we propose a design flow for accelerating the…
ASAP: Accelerated Short-Read Alignment on Programmable Hardware
Subho S. Banerjee, Mohamed El-Hadedy, Jong Bin Lim +4
The proliferation of high-throughput sequencing machines ensures rapid generation of up to billions of short nucleotide fragments in a short period of time. This massive amount of…