168 citations · 477 across the 22 of their papers we have counts for
22 papers
New Solutions on LLM Acceleration, Optimization, and Application
Yingbing Huang, Lily Jiaxin Wan, Hanchen Ye +5
Large Language Models (LLMs) have become extremely potent instruments with exceptional capacities for comprehending and producing human-like text in a wide range of applications. H…
Augmenting Hessians with Inter-Layer Dependencies for Mixed-Precision Post-Training Quantization
Clemens JS Schaefer, Navid Lambert-Shirzad, Xiaofan Zhang +7
Efficiently serving neural network models with low latency is becoming more challenging due to increasing model complexity and parameter count. Model quantization offers a solution…
Mixed Precision Post Training Quantization of Neural Networks with Sensitivity Guided Search
Clemens JS Schaefer, Elfie Guo, Caitlin Stanton +7
Serving large-scale machine learning (ML) models efficiently and with low latency has become challenging owing to increasing model size and complexity. Quantizing models can simult…
Compilation and Optimizations for Efficient Machine Learning on Embedded Systems
Xiaofan Zhang, Yao Chen, Cong Hao +3
Deep Neural Networks (DNNs) have achieved great success in a variety of machine learning (ML) applications, delivering high-quality inferencing solutions in computer vision, natura…
AutoDistill: an End-to-End Framework to Explore and Distill Hardware-Efficient Language Models
Xiaofan Zhang, Zongwei Zhou, Deming Chen +1
Recently, large pre-trained models have significantly improved the performance of various Natural LanguageProcessing (NLP) tasks but they are expensive to serve due to long serving…
EH-DNAS: End-to-End Hardware-aware Differentiable Neural Architecture Search
Qian Jiang, Xiaofan Zhang, Deming Chen +2
In hardware-aware Differentiable Neural Architecture Search (DNAS), it is challenging to compute gradients of hardware metrics to perform architecture search. Existing works rely o…
Scaling Up Hardware Accelerator Verification using A-QED with Functional Decomposition
Saranyu Chattopadhyay, Florian Lonsing, Luca Piccolboni +12
Hardware accelerators (HAs) are essential building blocks for fast and energy-efficient computing systems. Accelerator Quick Error Detection (A-QED) is a recent formal technique wh…
Being-ahead: Benchmarking and Exploring Accelerators for Hardware-Efficient AI Deployment
Xiaofan Zhang, Hanchen Ye, Deming Chen
Customized hardware accelerators have been developed to provide improved performance and efficiency for DNN inference and training. However, the existing hardware accelerators may…
F-CAD: A Framework to Explore Hardware Accelerators for Codec Avatar Decoding
Xiaofan Zhang, Dawei Wang, Pierce Chuang +3
Creating virtual avatars with realistic rendering is one of the most essential and challenging tasks to provide highly immersive virtual reality (VR) experiences. It requires not o…
Effective Algorithm-Accelerator Co-design for AI Solutions on Edge Devices
Cong Hao, Yao Chen, Xiaofan Zhang +4
High quality AI solutions require joint optimization of AI algorithms, such as deep neural networks (DNNs), and their hardware accelerators. To improve the overall solution quality…
DNNExplorer: A Framework for Modeling and Exploring a Novel Paradigm of FPGA-based DNN Accelerator
Xiaofan Zhang, Hanchen Ye, Junsong Wang +4
Existing FPGA-based DNN accelerators typically fall into two design paradigms. Either they adopt a generic reusable architecture to support different DNN networks but leave some pe…
EDD: Efficient Differentiable DNN Architecture and Implementation Co-search for Embedded AI Solutions
Yuhong Li, Cong Hao, Xiaofan Zhang +5
High quality AI solutions require joint optimization of AI algorithms and their hardware implementations. In this work, we are the first to propose a fully simultaneous, efficient…
HybridDNN: A Framework for High-Performance Hybrid DNN Accelerator Design and Implementation
Hanchen Ye, Xiaofan Zhang, Zhize Huang +2
To speedup Deep Neural Networks (DNN) accelerator design and enable effective implementation, we propose HybridDNN, a framework for building high-performance hybrid DNN accelerator…
AutoDNNchip: An Automated DNN Chip Predictor and Builder for Both FPGAs and ASICs
Pengfei Xu, Xiaofan Zhang, Cong Hao +7
Recent breakthroughs in Deep Neural Networks (DNNs) have fueled a growing demand for DNN chips. However, designing DNN chips is non-trivial because: (1) mainstream DNNs have millio…
SkyNet: a Hardware-Efficient Method for Object Detection and Tracking on Embedded Systems
Xiaofan Zhang, Haoming Lu, Cong Hao +9
Object detection and tracking are challenging tasks for resource-constrained embedded systems. While these tasks are among the most compute-intensive tasks from the artificial inte…
SkyNet: A Champion Model for DAC-SDC on Low Power Object Detection
Xiaofan Zhang, Cong Hao, Haoming Lu +9
Developing artificial intelligence (AI) at the edge is always challenging, since edge devices have limited computation capability and memory resources but need to meet demanding re…
A Bi-Directional Co-Design Approach to Enable Deep Learning on IoT Devices
Xiaofan Zhang, Cong Hao, Yuhong Li +4
Developing deep learning models for resource-constrained Internet-of-Things (IoT) devices is challenging, as it is difficult to achieve both good quality of results (QoR), such as…
FPGA/DNN Co-Design: An Efficient Design Methodology for IoT Intelligence on the Edge
Cong Hao, Xiaofan Zhang, Yuhong Li +5
While embedded FPGAs are attractive platforms for DNN acceleration on edge-devices due to their low latency and high energy efficiency, the scarcity of resources of edge-scale FPGA…
SiamVGG: Visual Tracking using Deeper Siamese Networks
Yuhong Li, Xiaofan Zhang, Deming Chen
Recently, we have seen a rapid development of Deep Neural Network (DNN) based visual tracking solutions. Some trackers combine the DNN-based solutions with Discriminative Correlati…
Design Flow of Accelerating Hybrid Extremely Low Bit-width Neural Network in Embedded FPGA
Junsong Wang, Qiuwen Lou, Xiaofan Zhang +3
Neural network accelerators with low latency and low energy consumption are desirable for edge computing. To create such accelerators, we propose a design flow for accelerating the…
Face Recognition with Hybrid Efficient Convolution Algorithms on FPGAs
Chuanhao Zhuge, Xinheng Liu, Xiaofan Zhang +3
Deep Convolutional Neural Networks have become a Swiss knife in solving critical artificial intelligence tasks. However, deploying deep CNN models for latency-critical tasks remain…
CSRNet: Dilated Convolutional Neural Networks for Understanding the Highly Congested Scenes
Yuhong Li, Xiaofan Zhang, Deming Chen
We propose a network for Congested Scene Recognition called CSRNet to provide a data-driven and deep learning method that can understand highly congested scenes and perform accurat…