activity
20172024
most citedX-SRAM: Enabling In-Memory Boolean Computations in CMOS Static Random Access Memories

324 citations · 566 across the 10 of their papers we have counts for

collaborators

10 papers

cs.AR2024

SpiDR: A Reconfigurable Digital Compute-in-Memory Spiking Neural Network Accelerator for Event-based Perception

Deepika Sharma, Shubham Negi, Trishit Dutta +2

Spiking Neural Networks (SNNs), with their inherent recurrence, offer an efficient method for processing the asynchronous temporal data generated by Dynamic Vision Sensors (DVS), m…

cs.AR2021★ 47 cited

IMPULSE: A 65nm Digital Compute-in-Memory Macro with Fused Weights and Membrane Potential for Spike-based Sequential Learning Tasks

Amogh Agrawal, Mustafa Ali, Minsuk Koo +3

The inherent dynamics of the neuron membrane potential in Spiking Neural Networks (SNNs) allows processing of sequential learning tasks, avoiding the complexity of recurrent neural…

cs.ET2020★ 131 cited

IMAC: In-memory multi-bit Multiplication andACcumulation in 6T SRAM Array

Mustafa Ali, Akhilesh Jaiswal, Sangamesh Kodge +3

`In-memory computing' is being widely explored as a novel computing paradigm to mitigate the well known memory bottleneck. This emerging paradigm aims at embedding some aspects of…

cs.ET2019★ 21 cited

X-CHANGR: Changing Memristive Crossbar Mapping for Mitigating Line-Resistance Induced Accuracy Degradation in Deep Neural Networks

Amogh Agrawal, Chankyu Lee, Kaushik Roy

There is widespread interest in emerging technologies, especially resistive crossbars for accelerating Deep Neural Networks (DNNs). Resistive crossbars offer a highly-parallel and…

cs.ET2018★ 1 cited

Xcel-RAM: Accelerating Binary Neural Networks in High-Throughput SRAM Compute Arrays

Amogh Agrawal, Akhilesh Jaiswal, Deboleena Roy +4

Deep neural networks are a biologically-inspired class of algorithms that have recently demonstrated state-of-the-art accuracies involving large-scale classification and recognitio…

cs.ET2018★ 18 cited

Design of a Low Voltage Analog-to-Digital Converter using Voltage Controlled Stochastic Switching of Low Barrier Nanomagnets

Indranil Chakraborty, Amogh Agrawal, Kaushik Roy

The inherent stochasticity in many nano-scale devices makes them prospective candidates for low-power computations. Such devices have been demonstrated to exhibit probabilistic swi…

cs.ET2018

8T SRAM Cell as a Multi-bit Dot Product Engine for Beyond von-Neumann Computing

Akhilesh Jaiswal, Indranil Chakraborty, Amogh Agrawal +1

Large scale digital computing almost exclusively relies on the von-Neumann architecture which comprises of separate units for storage and computations. The energy expensive transfe…

cs.ET2017★ 324 cited

X-SRAM: Enabling In-Memory Boolean Computations in CMOS Static Random Access Memories

Amogh Agrawal, Akhilesh Jaiswal, Chankyu Lee +1

Silicon-based Static Random Access Memories (SRAM) and digital Boolean logic have been the workhorse of the state-of-art computing platforms. Despite tremendous strides in scaling…

cs.ET2017★ 23 cited

SPARE: Spiking Networks Acceleration Using CMOS ROM-Embedded RAM as an In-Memory-Computation Primitive

Amogh Agrawal, Aayush Ankit, Kaushik Roy

Despite huge success of artificial intelligence, hardware systems running these algorithms consume orders of magnitude higher energy compared to the human brain, mainly due to heav…

cs.ET2017★ 1 cited

Voltage-Driven Domain-Wall Motion based Neuro-Synaptic Devices for Dynamic On-line Learning

Akhilesh Jaiswal, Amogh Agrawal, Priyadarshini Panda +1

Conventional von-Neumann computing models have achieved remarkable feats for the past few decades. However, they fail to deliver the required efficiency for certain basic tasks lik…