151 citations · 437 across the 32 of their papers we have counts for
32 papers
Comprehensive Benchmarking of Binary Neural Networks on NVM Crossbar Architectures
Ruirong Huang, Zichao Yue, Caroline Huang +2
Non-volatile memory (NVM) crossbars have been identified as a promising technology, for accelerating important machine learning operations, with matrix-vector multiplication being…
FLIQS: One-Shot Mixed-Precision Floating-Point and Integer Quantization Search
Jordan Dotzel, Gang Wu, Andrew Li +9
Quantization has become a mainstream compression technique for reducing model size, computational requirements, and energy consumption for modern deep neural networks (DNNs). With…
Towards Fast, Adaptive, and Hardware-Assisted User-Space Scheduling
Lisa, Li, Nikita Lazarev +7
Modern datacenter applications are prone to high tail latencies since their requests typically follow highly-dispersive distributions. Delivering fast interrupts is essential to re…
Slapo: A Schedule Language for Progressive Optimization of Large Deep Learning Model Training
Hongzheng Chen, Cody Hao Yu, Shuai Zheng +3
Recent years have seen an increase in the development of large deep learning (DL) models, which makes training efficiency crucial. Common practice is struggling with the trade-off…
TAPA: A Scalable Task-Parallel Dataflow Programming Framework for Modern FPGAs with Co-Optimization of HLS and Physical Design
Licheng Guo, Yuze Chi, Jason Lau +9
In this paper, we propose TAPA, an end-to-end framework that compiles a C++ task-parallel dataflow program into a high-frequency FPGA accelerator. Compared to existing solutions, T…
Analysis and Optimization of GNN-Based Recommender Systems on Persistent Memory
Yuwei Hu, Jiajie Li, Zhongming Yu +1
Graph neural networks (GNNs), which have emerged as an effective method for handling machine learning tasks on graphs, bring a new approach to building recommender systems, where t…
Structured Pruning is All You Need for Pruning CNNs at Initialization
Yaohui Cai, Weizhe Hua, Hongzheng Chen +3
Pruning is a popular technique for reducing the model size and computational cost of convolutional neural networks (CNNs). However, a slow retraining or fine-tuning procedure is of…
Understanding Hyperdimensional Computing for Parallel Single-Pass Learning
Tao Yu, Yichi Zhang, Zhiru Zhang +1
Hyperdimensional computing (HDC) is an emerging learning paradigm that computes with high dimensional binary vectors. It is attractive because of its energy efficiency and low late…
GARNET: Reduced-Rank Topology Learning for Robust and Scalable Graph Neural Networks
Chenhui Deng, Xiuyu Li, Zhuo Feng +1
Graph neural networks (GNNs) have been increasingly deployed in various applications that involve learning on non-Euclidean data. However, recent studies show that GNNs are vulnera…
PokeBNN: A Binary Pursuit of Lightweight Accuracy
Yichi Zhang, Zhiru Zhang, Lukasz Lew
Optimization of Top-1 ImageNet promotes enormous networks that may be impractical in inference settings. Binary neural networks (BNNs) have the potential to significantly lower the…
A Roadmap for Enabling a Future-Proof In-Network Computing Data Plane Ecosystem
Daehyeok Kim, Nikita Lazarev, Tommy Tracy +7
As the vision of in-network computing becomes more mature, we see two parallel evolutionary trends. First, we see the evolution of richer, more demanding applications that require…
Dense Pruning of Pointwise Convolutions in the Frequency Domain
Mark Buckler, Neil Adit, Yuwei Hu +2
Depthwise separable convolutions and frequency-domain convolutions are two recent ideas for building efficient convolutional neural networks. They are seemingly incompatible: the v…
BulletTrain: Accelerating Robust Neural Network Training via Boundary Example Mining
Weizhe Hua, Yichi Zhang, Chuan Guo +2
Neural network robustness has become a central topic in machine learning in recent years. Most training algorithms that improve the model's robustness to adversarial and common cor…
Scaling Up Hardware Accelerator Verification using A-QED with Functional Decomposition
Saranyu Chattopadhyay, Florian Lonsing, Luca Piccolboni +12
Hardware accelerators (HAs) are essential building blocks for fast and energy-efficient computing systems. Accelerator Quick Error Detection (A-QED) is a recent formal technique wh…
Dagger: Accelerating RPCs in Cloud Microservices Through Tightly-Coupled Reconfigurable NICs
Nikita Lazarev, Shaojie Xiang, Neil Adit +2
The ongoing shift of cloud services from monolithic designs to microservices creates high demand for efficient and high performance datacenter networking stacks, optimized for fine…
Enabling Design Methodologies and Future Trends for Edge AI: Specialization and Co-design
Cong Hao, Jordan Dotzel, Jinjun Xiong +3
Artificial intelligence (AI) technologies have dramatically advanced in recent years, resulting in revolutionary changes in people's lives. Empowered by edge computing, AI workload…
SPADE: A Spectral Method for Black-Box Adversarial Robustness Evaluation
Wuxinlin Cheng, Chenhui Deng, Zhiqiang Zhao +3
A black-box spectral method is introduced for evaluating the adversarial robustness of a given machine learning (ML) model. Our approach, named SPADE, exploits bijective distance m…
FracBNN: Accurate and FPGA-Efficient Binary Neural Networks with Fractional Activations
Yichi Zhang, Junhao Pan, Xinheng Liu +3
Binary neural networks (BNNs) have 1-bit weights and activations. Such networks are well suited for FPGAs, as their dominant computations are bitwise arithmetic and the memory requ…
Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization
Shubham Rai, Walter Lau Neto, Yukio Miyasaka +37
Logic synthesis is a fundamental step in hardware design whose goal is to find structural representations of Boolean functions while minimizing delay and area. If the function is c…
FeatGraph: A Flexible and Efficient Backend for Graph Neural Network Systems
Yuwei Hu, Zihao Ye, Minjie Wang +6
Graph neural networks (GNNs) are gaining increasing popularity as a promising approach to machine learning on graphs. Unlike traditional graph workloads where each vertex/edge is a…
GuardNN: Secure Accelerator Architecture for Privacy-Preserving Deep Learning
Weizhe Hua, Muhammad Umar, Zhiru Zhang +1
This paper proposes GuardNN, a secure DNN accelerator that provides hardware-based protection for user data and model parameters even in an untrusted environment. GuardNN shows tha…
Dagger: Towards Efficient RPCs in Cloud Microservices with Near-Memory Reconfigurable NICs
Nikita Lazarev, Neil Adit, Shaojie Xiang +2
Cloud applications are increasingly relying on hundreds of loosely-coupled microservices to complete user requests that meet an applications end-to-end QoS requirements. Communicat…
Predictable Accelerator Design with Time-Sensitive Affine Types
Rachit Nigam, Sachille Atapattu, Samuel Thomas +6
Field-programmable gate arrays (FPGAs) provide an opportunity to co-design applications with hardware accelerators, yet they remain difficult to program. High-level synthesis (HLS)…
MGX: Near-Zero Overhead Memory Protection for Data-Intensive Accelerators
Weizhe Hua, Muhammad Umar, Zhiru Zhang +1
This paper introduces MGX, a near-zero overhead memory protection scheme for hardware accelerators. MGX minimizes the performance overhead of off-chip memory encryption and integri…