activity
20172026
most citedSCNN: An Accelerator for Compressed-sparse Convolutional Neural Networks

125 citations · 361 across the 46 of their papers we have counts for

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9 papers · 1 filter

cs.AR2026

Agentic Hardware Design as Repository-Level Code Evolution

Cunxi Yu, Chenhui Deng, Nathaniel Pinckney +1

We present HORIZON, a self-evolving agent framework that treats hardware design as repository-level code evolution. A Markdown harness is compiled into a project pack containing do…

cs.AR2026

AUTOGATE: Automated Clock Gating via Toggling-Aware LLM-based RTL Rewriting

Yiting Wang, Chenhui Deng, Chia-Tung Ho +6

Fine-grain clock gating (FGCG) is among the most effective techniques for reducing dynamic power, yet current FGCG optimization flows remain largely manual. Recent LLM-based RTL op…

cs.AR2026

ACE-RTL: When Agentic Context Evolution Meets RTL-Specialized LLMs

Chenhui Deng, Zhongzhi Yu, Guan-Ting Liu +3

Recent advances in LLMs have sparked growing interest in applying them to hardware design automation, particularly for accurate RTL code generation. Prior efforts follow two largel…

cs.AR2026

GRPO with State Mutations: Improving LLM-Based Hardware Test Plan Generation

Dimple Vijay Kochar, Nathaniel Pinckney, Guan-Ting Liu +4

RTL design often relies heavily on ad-hoc testbench creation early in the design cycle. While large language models (LLMs) show promise for RTL code generation, their ability to re…

cs.AR2025

FGMP: Fine-Grained Mixed-Precision Weight and Activation Quantization for Hardware-Accelerated LLM Inference

Coleman Hooper, Charbel Sakr, Ben Keller +4

Quantization is a powerful tool to improve large language model (LLM) inference efficiency by utilizing more energy-efficient low-precision datapaths and reducing memory footprint.…

cs.AR2025

Marco: Configurable Graph-Based Task Solving and Multi-AI Agents Framework for Hardware Design

Chia-Tung Ho, Jing Gong, Yunsheng Bai +3

Hardware design presents numerous challenges stemming from its complexity and advancing technologies. These challenges result in longer turn-around-time (TAT) for optimizing perfor…

cs.AR2024★ 5 cited

Revisiting VerilogEval: A Year of Improvements in Large-Language Models for Hardware Code Generation

Nathaniel Pinckney, Christopher Batten, Mingjie Liu +2

The application of large-language models (LLMs) to digital hardware code generation is an emerging field, with most LLMs primarily trained on natural language and software code. Ha…

cs.AR2021

Softermax: Hardware/Software Co-Design of an Efficient Softmax for Transformers

Jacob R. Stevens, Rangharajan Venkatesan, Steve Dai +2

Transformers have transformed the field of natural language processing. This performance is largely attributed to the use of stacked self-attention layers, each of which consists o…

cs.AR2020

MAVIREC: ML-Aided Vectored IR-DropEstimation and Classification

Vidya A. Chhabria, Yanqing Zhang, Haoxing Ren +3

Vectored IR drop analysis is a critical step in chip signoff that checks the power integrity of an on-chip power delivery network. Due to the prohibitive runtimes of dynamic IR dro…