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researcher

Eduardo B. Pereira

1 paper hereh-index 260 citations5 works total

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author position
  • middle author1

Across the 1 of 1 paper where every author was matched, so the position is known.

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  • cs.OH1

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most citedImplementation of the Logistic Map with FPGA using 32 bits fixed point standard

1 citations · 1 across the 1 of their papers we have counts for

collaborators

1 paper

cs.OH2017★ 1 cited

Implementation of the Logistic Map with FPGA using 32 bits fixed point standard

Diego A. Silva, Eduardo B. Pereira, Erivelton G. Nepomuceno

This article presents a design of the logistic map by means of FPGA (Field Programmable Gate Ar-ray) under fixed-point standard and 32-bits of precision. The design was carried out…

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Not affiliated with arXiv. Researcher data from Semantic Scholar (ODC-BY) and OpenAlex.