Evidence of Water-related Discrete Trap State Formation in Pentacene Single Crystal Field-Effect Transistors

Abstract

We report on the generation of a discrete trap state during negative gate bias stress in pentacene single crystal "flip-crystal" field-effect transistors with a SiO2 gate dielectric. Trap densities of up to 2*10^12 cm^-2 were created in the experiments. Trap formation and trap relaxation are distinctly different above and below ~280 K. In devices in which a self-assembled monolayer on top of the SiO2 provides a hydrophobic insulator surface we do not observe trap formation. These results indicate the microscopic cause of the trap state to be water adsorbed on the SiO2 surface.

arXiv comment13 pages, 4 figures, submitted to Applied Physics Letters

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Cited by in corpus (3)

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• Defect healing at room temperature in pentacene thin films and improved transistor performance