Calibration-Free Photonic Memory in a Silicon Photonics Platform

Abstract

We propose a calibration-free photonic memory bitcell based on nonresonant variable optical attenuators in the GlobalFoundries 45SPCLO platform. The cell maintains complementary electrical states through electro-optical feedback without cavity-resonance alignment. Wordline-controlled attenuators enable selective writing through differential optical bitlines, while optical readout shares the holding input and output splitters, avoiding additional read attenuators or a separate laser source. Circuit simulations demonstrate writing with $10\mathrm{ps}$ optical pulses at $2\mathrm{mW}$ peak power. The cell retains data as long as optical and electrical power are supplied, with retention simulated for $5\mathrm{s}$ per logic state. The evaluated transition consumes an incremental write energy of $0.562\mathrm{pJ}$, including circuit electrical energy and the laser contribution at 20\% wall-plug efficiency. The bitcell layout occupies $147.92\times 219.93\mu {\mathrm{m}}^2$.

arXiv comment9 Pages, 4 Figures