Implementing Homomorphic Encryption-Based Logic Locking in System-on-Chip Designs
arXiv:2607.28542 · doi:10.1109/TVLSI.2025.3556241
The paper proposes a logic locking scheme for RISC‑V system‑on‑chip designs that uses the binary Ring‑LWE homomorphic encryption algorithm to protect privileged logic paths without exposing locking parameters, and evaluates its hardware overhead and unlock latency.
Abstract
This study presents a logic locking scheme based on the binary Ring Learning With Errors algorithm, implemented in a RISC-V System-on-Chip design. Unlike traditional logic locking methods that require providing users with raw locking parameters, the proposed approach secures critical logic paths in the privilege switching process without exposing these sensitive parameters. The implemented locking module itself consumes 3519 Look-Up Tables and 2645 Registers, leading to an overall overhead of 6.0% in Look-Up Tables and 6.9% in Registers compared to the baseline system. The unlock process requires about 2.6 us, introducing moderate performance impact, primarily affecting system-level operations while preserving user-level computational efficiency.